Non-volatile memory device

1. A non-volatile memory device comprising:

a substrate;

a memory cell array including:

a plurality of first lines arranged in parallel to each other above the substrate;

a plurality of second lines arranged in parallel to each other crossing the plurality of first lines three-dimensionally; and

a plurality of memory cells each including a first variable resistance element and a first current steering element and placed at a corresponding one of cross-points of the first lines and the second lines; and

a parameter generation circuit including:

a third line placed above the substrate;

a fourth line placed above the third line; and

a current steering characteristic reference cell placed between and connected to the third line and the fourth line and including a second variable resistance element and a second current steering element having a same current density-voltage characteristic as a current density-voltage characteristic of the first current steering element,

wherein the second variable resistance element includes:

a lower electrode layer;

a variable resistance layer formed above the lower electrode layer; and

an upper electrode layer formed above the variable resistance layer, and

in the current steering characteristic reference cell,

the second variable resistance element has a side surface with a conductive shorting layer for short-circuiting the upper electrode layer and the lower electrode layer.

2. The non-volatile memory device according to claim 1 ,

wherein the second current steering element is an element for determining a non-linear current steering characteristic of the first current steering element.

3. The non-volatile memory device according to claim 1 , comprising:

a control circuit;

a write circuit which applies, to one or more predetermined memory cells among the plurality of memory cells, a voltage for writing information to the one or more predetermined memory cells; and

a read circuit which applies, to one or more predetermined memory cells among the plurality of memory cells, a voltage for reading the information from the one or more predetermined memory cells,

wherein the parameter generation circuit obtains a parameter indicating a non-linear current steering characteristic of the second current steering element, and outputs a parameter signal corresponding to the parameter to the control circuit,

the control circuit generates a control signal for controlling the write circuit and the read circuit based on the parameter signal, and outputs the control signal to at least one of the write circuit and the read circuit, and

the at least one of the write circuit and the read circuit determines the voltage to be applied to the one or more predetermined memory cells based on the control signal.

4. The non-volatile memory device according to claim 1 ,

wherein the first current steering element includes:

a lower electrode layer;

a current steering layer formed above the lower electrode layer of the first current steering element; and

an upper electrode layer formed above the current steering layer of the first current steering element,

the second current steering element includes:

a lower electrode layer;

a current steering layer formed above the lower electrode layer of the second current steering element; and

an upper electrode layer formed above the current steering layer of the second current steering element,

the lower electrode layer of the first current steering element and the lower electrode layer of the second current steering element have a same composition,

the current steering layer of the first current steering element and the current steering layer of the second current steering element have a same composition and a same film thickness, and

the upper electrode layer of the first current steering element and the upper electrode layer of the second current steering element have a same composition.

5. The non-volatile memory device according to claim 4 ,

wherein the current steering layer of the first current steering layer and the current steering layer of the second current steering layer are formed in a single process.

6. The non-volatile memory device according to claim 1 ,

wherein the first variable resistance element includes:

a lower electrode layer;

a variable resistance layer formed above the lower electrode layer of the first variable resistance element; and

an upper electrode layer formed above the variable resistance layer of the first variable resistance element,

the lower electrode layer of the first variable resistance element and the lower electrode layer of the second variable resistance element have a same composition,

the variable resistance layer of the first variable resistance element and the variable resistance layer of the second variable resistance element have a same composition and a same film thickness, and

the upper electrode layer of the first variable resistance element and the upper electrode layer of the second variable resistance element have a same composition.

7. The non-volatile memory device according to claim 6 ,

wherein the variable resistance layer of the first variable resistance element and the variable resistance layer of the second variable resistance element are formed in a single process.

8. The non-volatile memory device according to claim 1 ,

wherein in each of the memory cells:

the first current steering element and the first variable resistance element are connected in series; and

the first variable resistance element is placed above the first current steering element, and

in the current steering characteristic reference cell:

the second variable resistance element and the second current steering element are connected in series; and

the second variable resistance element is placed above the second current steering element.

9. The non-volatile memory device according to claim 8 ,

wherein the second current steering element includes:

a lower electrode layer;

a current steering layer formed above the lower electrode layer of the second current steering element; and

an upper electrode layer formed above the current steering layer of the second current steering element, and

the conductive shorting layer is in contact with at least one of the lower electrode layer of the second variable resistance element and the upper electrode layer of the second current steering element.

10. The non-volatile memory device according to claim 9 ,

wherein the conductive shorting layer is a part of the fourth line.

11. The non-volatile memory device according to claim 10 ,

wherein the fourth line has a bottom surface positioned deeper than an upper surface of the lower electrode layer of the second variable resistance element.

12. The non-volatile memory device according to claim 9 ,

wherein the parameter generation circuit includes a plurality of the current steering characteristic reference cells,

each of the current steering characteristic reference cells includes the conductive shorting layer, and

the conductive shorting layer is a part of a contact plug of the current steering characteristic reference cell positioned between the fourth line and the upper electrode layer of the second variable resistance element.

13. The non-volatile memory device according to claim 12 ,

wherein centers of the contact plug of the current steering characteristic reference cell and the variable resistance layer of the second variable resistance element are different when seen from a direction perpendicular to an upper surface of the substrate.

14. The non-volatile memory device according to claim 9 ,

wherein the first variable resistance element includes:

a lower electrode layer;

a variable resistance layer formed above the lower electrode layer of the first variable resistance element; and

an upper electrode layer formed above the variable resistance layer of the first variable resistance element,

the lower electrode layer of the first variable resistance element and the upper electrode layer of the first variable resistance element are electrically connected via the variable resistance layer, and

the first variable resistance element has a side surface covered by a dielectric side wall.

15. The non-volatile memory device according to claim 9 ,

wherein each of the first current steering element and the second current steering element has a side surface covered by a dielectric side wall.

16. The non-volatile memory device according to claim 15 ,

wherein the first variable resistance element has a side surface covered by a dielectric side wall.

17. The non-volatile memory device according to claim 9 ,

wherein the conductive shorting layer is a conductive side wall.

18. The non-volatile memory device according to claim 1 ,

wherein in each of the memory cells:

the first current steering element and the first variable resistance element are connected in series; and

the first current steering element is placed above the first variable resistance element, and

in the current steering characteristic reference cell:

the second current steering element and the second variable resistance element are connected in series; and

the second current steering element is placed above the second variable resistance element.

19. The non-volatile memory device according to claim 18 ,

wherein the conductive shorting layer is a conductive side wall.