Designing method of non-volatile memory device, manufacturing method of non-volatile memory device, and non-volatile memory device

1. A method of designing a cross-point non-volatile memory device including memory elements arranged in (N ×M) matrix, each of the memory elements including a variable resistance element and a bidirectional current steering element connected in series with the variable resistance element,

the variable resistance element being configured such that when a high-resistance state writing voltage is applied to the variable resistance element in a low-resistance state, the variable resistance element reversibly changes to a high resistance state in which the variable resistance element has a greater resistance value than in the low-resistance state, while when a low-resistance state writing voltage different in polarity from the high-resistance state writing voltage is applied to the variable resistance element in the high-resistance state, the variable resistance element reversibly changes to the low-resistance state, the method comprising the step of:

when an absolute value of the low-resistance state writing voltage is VR and an absolute value of a current flowing through the variable resistance element having changed to the low-resistance state by application of the low-resistance state writing voltage to both ends of the variable resistance element in the high-resistance state is I on , and a relationship between a voltage V 0 applied to both ends of the bidirectional current steering element and a current I flowing through the bidirectional current steering element is approximated as|V 0 |=a ×Log (I) +b,

deciding N, M, VR, I on , a, and b such that b −VR /2 >a ×[Log {(N −1) ×(M −1)}−Log (I on )] is satisfied.

2. The method of designing the cross-point non-volatile memory device according to claim 1 , further comprising the steps of:

deciding N and M based on a target value of a storage capacity of the non-volatile memory device;

deciding VR, I on , and I off based on a characteristic of the variable resistance element; and

deciding a and b such that b −VR /2 >a ×[Log {(N −1) x (M −1)}−Log (I on )] is satisfied, based on the decided N, M, VR, and I on , after deciding N and M and deciding VR, I on , and I off .

3. The method of designing the cross-point non-volatile memory device according to claim 1 , wherein N, M, VR, I on , a, and b are decided under a condition in which a >0.106.

4. The method of designing the cross-point non-volatile memory device according to claim 1 , wherein N, M, VR, I on , a, and b are decided under a condition in which b >0.

5. The method of designing the cross-point non-volatile memory device according to claim 1 , wherein the bidirectional current steering element includes a first electrode, a second electrode, and a current steering layer interposed between the first electrode and the second electrode, and the current steering layer comprises SiN x (0 <x ≦0.85 ).

6. A method of manufacturing a cross-point non-volatile memory device, comprising the steps of:

designing the cross-point non-volatile memory device by the method of designing the cross-point non-volatile memory device as recited in any one of claims 1 to 5 ; and

manufacturing the cross-point non-volatile memory device based on the design;

wherein the cross-point non-volatile memory device includes:

memory elements arranged in (N ×M) matrix, each of the memory elements including a variable resistance element and a bidirectional current steering element connected in series with the variable resistance element,

wherein when the absolute value of the low-resistance state writing voltage is VR and the absolute value of the current flowing through the variable resistance element having changed to the low-resistance state by application of the low-resistance state writing voltage to both ends of the variable resistance element in the high-resistance state is I on , and a relationship between the voltage V 0 applied to both ends of the bidirectional current steering element and the current I flowing through the bidirectional current steering element is approximated as |V 0 |=a ×Log (I) +b, in a range of I on ×10 -3 ≦I ≦I on ,

b −VR /2 >a ×[Log {(N −1) (M −1)}−Log (I on )]is satisfied.

7. A cross-point non-volatile memory device comprising:

memory elements arranged in (N ×M) matrix;

each of the memory elements including a variable resistance element and a bidirectional current steering element connected in series with the variable resistance element;

the variable resistance element being configured such that when a high-resistance state writing voltage is applied to the variable resistance element in a low-resistance state, the variable resistance element reversibly changes to a high-resistance state in which the variable resistance element has a greater resistance value than in the low-resistance state, while when a low-resistance state writing voltage different in polarity from the high-resistance state writing voltage is applied to the variable resistance element in the high-resistance state, the variable resistance element reversibly changes to the low-resistance state;

wherein when an absolute value of the low-resistance state writing voltage is VR and an absolute value of a current flowing through the variable resistance element having changed to the low-resistance state by application of the low-resistance state writing voltage to both ends of the variable resistance element in the high-resistance state is I on , and a relationship between a voltage V 0 applied to both ends of the bidirectional current steering element and a current I flowing through the bidirectional current steering element is approximated as |V 0 |=a ×Log (I) +b,

b −VR /2 >a ×[Log {(N −1) ×(M −1)} −Log (I on )]is satisfied.

8. The cross-point non-volatile memory device according to claim 7 , wherein a >0.106.

9. The cross-point non-volatile memory device according to claim 7 ,

wherein b >0.

10. The cross-point non-volatile memory device according to claim 7 , wherein the bidirectional current steering element includes a first electrode, a second electrode, and a current steering layer interposed between the first electrode and the second electrode, and the current steering layer comprises SiN X (0 <×≦0.85).

11. The cross-point non-volatile memory device according to claim 7 , wherein a ≧0.155.

12. The cross-point non-volatile memory device according to claim 7 , wherein b ≧0.48.

13. The cross-point non-volatile memory device according to claim 7 , wherein 0.155≦a ≦0.291.

14. The cross-point non-volatile memory device according to claim 7 , wherein 0.48≦b 1.64.