IP Library Granted Patent US 10,055,585
Granted Patent B2
US 10,055,585 · App. 14/129,246 · Granted Aug 21, 2018

Hardware and software execution profiling

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Quick Facts
Patent No.
US 10,055,585
App. No.
14/129,246
Granted
Aug 21, 2018
Kind
B2
Abstract

Technologies for assembling an execution profile of an event are disclosed. The technologies may include monitoring the event for a branch instruction, generating a callback to a security module upon execution of the branch instruction, filtering the callback according to a plurality of event identifiers, and validating a code segment associated with the branch instruction, the code segment including code executed before the branch instruction and code executed after the branch instruction.

Claims (37)

1. A method for assembling an execution profile of an event, the method comprising:

monitoring a process invoked in response to the event for a branch instruction;

generating a callback to a security module upon execution of the branch instruction;

filtering the callback according to filtering criteria that is dependent on a plurality of identifiers associated with the event; and

validating, by the security module in response to the filtering criteria being met, a code segment associated with the branch instruction, the code segment including code executed before the branch instruction and code executed after the branch instruction, the validation including determining whether the code segment is associated with a manipulation of return addresses associated with branch instructions.

2. The method of claim 1 , further comprising checking the code segment for use of return-oriented programming techniques.

3. The method of claim 1 , further comprising managing security policies for the system.

4. The method of claim 1 , further comprising monitoring the process invoked in response to the event for the branch instruction using binary translation-based techniques.

5. The method of claim 1 , further comprising providing an event trigger from a monitoring extension to a processor, the event trigger for use in monitoring the process invoked in response to the event for the branch instruction.

6. The method of claim 1 , further comprising providing an event trigger from a monitoring extension to a processor, the event trigger for use in monitoring the process invoked in response to the event for the branch instruction, wherein the event trigger comprises a trigger when an instruction of a particular type is executed.

7. The method of claim 1 , further comprising providing an event trigger from a monitoring extension to a processor, the event trigger for use in monitoring the process invoked in response to the event for the branch instruction, wherein the event trigger comprises a trigger invoking a registered callback for handling of the event.

8. A system for securing an electronic device, comprising:

a memory;

a processor; and

one or more security agents including instructions resident in the memory and operable for execution by the processor, wherein the security agents are configured to:

assemble an execution profile of an event;

monitor a process invoked in response to the event for a branch instruction;

generate a callback upon execution of the branch instruction;

filter the callback according to filtering criteria that is dependent on a plurality of identifiers associated with the event; and

validate, in response to the filtering criteria being met, a code segment associated with the branch instruction, the code segment including code executed before the branch instruction and code executed after the branch instruction, the validation including determining whether the code segment is associated with a manipulation of return addresses associated with branch instructions.

9. The system of claim 8 , wherein the security agents are further configured to check the code segment for use of return-oriented programming techniques.

10. The system of claim 8 , wherein the security agents are further configured to access managing security policies for the system to assemble the execution profile.

11. The system of claim 8 , wherein the security agents are further configured to monitor the process invoked in response to the event for the branch instruction using binary translation-based techniques.

12. The system of claim 8 , wherein the security agents are further configured to access an event trigger from a monitoring extension of the processor to monitor the process invoked in response to the event for a branch instruction.

13. The system of claim 8 , wherein the security agents are further configured to access an event trigger from a monitoring extension of the processor to monitor the process invoked in response to the event for a branch instruction, the event trigger based upon an instruction of a particular type is executed.

14. The system of claim 8 , wherein the security agents are further configured to access an event trigger from a monitoring extension of the processor to monitor the process invoked in response to the event for a branch instruction, the event trigger invoking a registered callback for handling of the event.

15. At least one non-transitory machine readable storage medium, comprising computer-executable instructions carried on the machine readable medium, the instructions readable by a processor, the instructions, when read and executed, for causing the processor to:

assemble an execution profile of an event;

monitor a process invoked in response to the event for a branch instruction;

generate a callback to a security module upon execution of the branch instruction;

filter the callback according to filtering criteria that is dependent on a plurality of identifiers associated with the event; and

validate, by the security module in response to the filtering criteria being met, a code segment associated with the branch instruction, the code segment including code executed before the branch instruction and code executed after the branch instruction, the validation including determining whether the code segment is associated with a manipulation of return addresses associated with branch instructions.

16. The medium of claim 15 , wherein the instructions further cause the processor to check the code segment for use of return-oriented programming techniques.

17. The medium of claim 15 , wherein the instructions further cause the processor to monitor the process invoked in response to the event for the branch instruction using binary translation-based techniques.

18. The medium of claim 15 , wherein the instructions further cause the processor to access an event trigger from a monitoring extension of the processor to monitor the process invoked in response to the event for a branch instruction.

19. The medium of claim 15 , wherein the instructions further cause the processor to access an event trigger from a monitoring extension of the processor to monitor the process invoked in response to the event for a branch instruction, the event trigger based upon an instruction of a particular type is executed.

20. The medium of claim 15 , wherein the instructions further cause the processor to access an event trigger from a monitoring extension of the processor to monitor the process invoked in response to the event for a branch instruction, the event trigger invoking a registered callback for handling of the event.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE PATENT TITLES AND REMOVE DUPLICATES IN THE SCHEDULE PREVIOUSLY RECORDED AT REEL: 059354 FRAME: 0335. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 23, 2022
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 060792/0307 →
SECURITY INTEREST Recorded Mar 3, 2022
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
Reel/Frame 059354/0335 →
RELEASE OF INTELLECTUAL PROPERTY COLLATERAL - REEL/FRAME 045056/0676 Recorded Mar 2, 2022
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MCAFEE, LLC
Reel/Frame 059354/0213 →
RELEASE OF INTELLECTUAL PROPERTY COLLATERAL - REEL/FRAME 045055/0786 Recorded Oct 26, 2020
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MCAFEE, LLC
Reel/Frame 054238/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENT 6336186 PREVIOUSLY RECORDED ON REEL 045055 FRAME 786. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 22, 2020
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 055854/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENT 6336186 PREVIOUSLY RECORDED ON REEL 045056 FRAME 0676. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 22, 2020
From: MCAFEE, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 054206/0593 →
SECURITY INTEREST Recorded Jan 12, 2018
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 045055/0786 →
SECURITY INTEREST Recorded Jan 12, 2018
From: MCAFEE, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 045056/0676 →
CHANGE OF NAME AND ENTITY CONVERSION Recorded Aug 24, 2017
From: MCAFEE, INC.
To: MCAFEE, LLC
Reel/Frame 043665/0918 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2016
From: INTEL CORPORATION
To: MCAFEE, INC.
Reel/Frame 040588/0611 →