Granted Patent B2

US 8,993,383 · App. 14/130,939 · Granted Mar 31, 2015

Abstract

Claims (61)

1. A method for manufacturing a thin-film transistor, the method comprising:

preparing a substrate;

forming a gate electrode above the substrate;

forming a gate insulating layer above the gate electrode;

forming a semiconductor film above the gate insulating layer;

forming, above the semiconductor film, an etch-stopper layer comprising an organic material;

forming a source electrode and a drain electrode that are opposed to each other, each of the source electrode and the drain electrode having at least a portion located above the etch-stopper layer;

forming a semiconductor layer patterned, by performing dry etching on the semiconductor film;

removing at least a portion of a region of an altered layer, the region contacting the semiconductor layer, the altered layer being a surface layer of the etch-stopper layer that is (i) exposed from the source electrode and the drain electrode and (ii) altered by the dry etching; and

forming a passivation layer so as to contact the semiconductor layer in a region in which the altered layer has been removed, the passivation layer having a major component identical to a major component of the etch-stopper layer.

2. The method for manufacturing the thin-film transistor according to claim 1 ,

wherein the altered layer has a density higher than a density of a portion of the etch-stopper layer which is not altered by the dry etching.

3. The method for manufacturing the thin-film transistor according to claim 1 ,

wherein the altered layer has a thickness of at least 30 nm.

4. The method for manufacturing the thin-film transistor according to claim 1 ,

wherein the altered layer has a chlorine concentration which is at least ten times higher than a chlorine concentration of the etch-stopper layer.

5. The method for manufacturing the thin-film transistor according to claim 1 ,

wherein the altered layer has a carbon concentration which is at most one hundredth of a carbon concentration of the etch-stopper layer.

6. The method for manufacturing the thin-film transistor according to claim 1 ,

wherein in the removing, the altered layer is removed by dilute hydrofluoric acid.

7. The method for manufacturing the thin-film transistor according to claim 6 ,

wherein the dilute hydrofluoric acid has a concentration of at least 0.5%, and

in the removing, the altered layer is removed by performing cleaning using the dilute hydrofluoric acid over at least ten seconds.

8. The method for manufacturing the thin-film transistor according to claim 1 ,

wherein the passivation layer comprises a material identical to a material of the etch-stopper layer.

9. The method for manufacturing the thin-film transistor according to claim 1 ,

wherein the passivation layer comprises an inorganic material.

10. The method for manufacturing the thin-film transistor according to claim 9 ,

wherein the etch-stopper layer comprises silicon as a major component, and

the passivation layer comprises oxide silicon.

11. The method for manufacturing the thin-film transistor according to claim 1 ,

wherein the passivation layer has a thickness of at least 20 nm and at most 1000 nm.

12. The method for manufacturing the thin-film transistor according claim 1 , further comprising

forming, above the passivation layer, a sealing layer comprising a material having an oxygen transmission rate lower than an oxygen transmission rate of the passivation layer.

13. The method for manufacturing the thin-film transistor according to claim 12 ,

wherein the sealing layer comprises silicon nitride.

14. A thin-film transistor comprising:

a gate electrode above a substrate;

a gate insulating layer above the gate electrode;

a semiconductor layer that is opposed to the gate electrode with the gate insulating layer therebetween;

an etch-stopper layer above the semiconductor layer and comprising an organic material;

a source electrode and a drain electrode that are opposed to each other, each of the source electrode and the drain electrode having at least a portion located above the etch-stopper layer; and

a passivation layer above the etch-stopper layer,

wherein the etch-stopper layer has a surface portion and a portion located further inward than the surface portion which are uniform in composition, and

the passivation layer covers a border between (i) a surface of the etch-stopper layer and (ii) the semiconductor layer, and an outer peripheral region that is a surface of the semiconductor layer and located further outward than the border relative to a region where the etch-stopper layer is located, the passivation layer contacting the border and the outer peripheral region and having a major component identical to a major component of the etch-stopper layer.

15. The thin-film transistor according to claim 14 ,

wherein the etch-stopper layer has a uniform composition throughout.

16. The thin-film transistor according to claim 14 ,

wherein the semiconductor layer includes a protruding portion protruding from the etch-stopper layer in a gate width direction, and

the protruding portion has an upper surface covered with the passivation layer.

17. The thin-film transistor according to claim 14 ,

wherein the passivation layer comprises an inorganic material.

18. The thin-film transistor according to claim 17 ,

wherein the etch-stopper layer comprises silicon as a major component, and

the passivation layer comprises silicon oxide.

19. The thin-film transistor according to claim 14 ,

wherein the passivation layer has a thickness of at least 20 nm and at most 1000 nm.

20. The thin-film transistor according to claim 14 , further comprises

a sealing layer above the passivation layer and comprising a material having an oxygen transmission rate lower than an oxygen transmission rate of the passivation layer.

21. The thin-film transistor according to claim 20 ,

wherein the sealing layer comprises silicon nitride.

Assignments (6)