Method of bonding a semiconductor device to a support substrate
View Patent ↗A method according to embodiments of the invention includes providing a wafer of semiconductor devices grown on a growth substrate. The wafer of semiconductor devices has a first surface and a second surface opposite the first surface. The second surface is a surface of the growth substrate. The method further includes bonding the first surface to a first wafer and bonding the second surface to a second wafer. In some embodiments, the first and second wafer each have a different coefficient of thermal expansion than the growth substrate. In some embodiments, the second wafer may compensate for stress introduced to the wafer of semiconductor devices by the first wafer.
1. A method comprising:
providing a wafer of semiconductor devices grown on a growth substrate, each semiconductor device comprising an n-type region and a p-type region, wherein the wafer of semiconductor devices has a first surface and a second surface opposite the first surface, wherein the second surface is a surface of the growth substrate;
bonding the first surface to a first wafer, the first wafer comprising a body;
bonding the second surface to a second wafer, wherein the first and second wafer each have a different coefficient of thermal expansion than the growth substrate;
after bonding the first surface to the first wafer, for each semiconductor device, etching a first via through an entire thickness of the body to expose a metal electrically connected to the n-type region and etching a second via through an entire thickness of the body to expose a metal electrically connected to the p-type region;
after etching the first and second vias, removing the second wafer.
2. The method of claim 1 further comprising disposing a first metal layer in the first via and disposing a second metal layer in the second via, wherein the first and second metal layers electrically connect the first surface of the body to a second surface of the body opposite the first surface.
3. The method of claim 1 further comprising after removing the second wafer, removing the growth substrate.
4. The method of claim 1 wherein the growth substrate is sapphire and the first and second wafers are silicon.
5. The method of claim 1 wherein bonding the first surface to a first wafer and bonding the second surface to a second wafer occur in a single bonding step.
6. The method of claim 1 wherein bonding the first surface to a first wafer occurs before bonding the second surface to a second wafer.
7. The method of claim 1 wherein bonding the first surface to a first wafer occurs after bonding the second surface to a second wafer.
8. The method of claim 1 wherein the semiconductor devices comprise a III-nitride light emitting layer sandwiched between an n-type region and a p-type region.
9. The method of claim 1 wherein a first bonding layer is disposed between the first surface and the first wafer and a second bonding layer is disposed between the second surface and the second wafer.
10. The method of claim 9 wherein the first bonding layer bonds at ,a higher temperature than the second bonding layer.
11. The method of claim 9 wherein:
the first wafer is silicon and is bonded to the first surface by a first bonding material;
the second wafer is silicon and is bonded to the second surface by a second bonding material; and,
the second wafer is thicker than the first wafer.
12. A method comprising:
providing a wafer of semiconductor devices grown on a growth substrate, wherein the wafer of semiconductor devices has a first surface and a second surface opposite the first surface, wherein the second surface is a surface of the growth substrate;
bonding the first surface to a first wafer; and
bonding the second surface to a second wafer, wherein the second wafer is configured to reduce warp in the wafer of semiconductor devices caused by bonding to the first wafer;
wherein a thickness of the second wafer satisfies [(CTE growth −CTE second )(T bond1 −T room )(E second )]/[(1−ν second )(t second )]=[(CTE growth −CTE first )(T bond2 −T room )(E first )]/[(1−ν first )(t first )], where CTE growth is a coefficient of thermal expansion of the growth substrate, CTE second is a coefficient of thermal expansion of the second wafer, CTE first is a coefficient of thermal expansion of the first wafer, T room is 25° C., T bond is a bonding temperature of the bond between the wafer of semiconductor devices and the second wafer, T bond2 is a bonding temperature of the bond between the wafer of semiconductor devices and the first wafer, E second is a Young's modulus of the second wafer, E first is a Young's modulus of the first wafer, V second is a Poisson's ratio of the second wafer, v first is a Poisson's ratio of the first wafer, T second is a thickness of the second wafer, and T first is a thickness of the first wafer.