IP Library Granted Patent US 9,513,838
Granted Patent B2
US 9,513,838 · App. 14/132,858 · Granted Dec 6, 2016

Method and apparatus for processing system command during memory backup

Inventors: Yongbo Cheng (Chengdu, CN); Chenghong He (Shenzhen, CN); Kejia Lan (Chengdu, CN)
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
G06F3/065G06F3/0604G06F3/0659G06F3/0683G06F11/1666G06F11/20
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Quick Facts
Patent No.
US 9,513,838
App. No.
14/132,858
Granted
Dec 6, 2016
Kind
B2
Abstract

A method and an apparatus for processing a system command during memory backup. The method includes: acquiring a write address corresponding to a write operation command; if data corresponding to the write address has been read from a raw memory area but is not written to a backup memory area, mapping the write operation command to the raw memory area, and writing data to the write address in the raw memory area according to the write operation command; and deducting a set value from the write address to obtain an initial address to subsequently read data from the raw memory area. According to the embodiments of the present invention, a problem of system command blocking is solved during a memory backup operation, so that a system command is processed in a timely manner.

Claims (37)

1. A method for processing a system command during a memory backup process, wherein through the memory backup process, data is sequentially read from a raw memory area in ascending order of addresses of the data and the read data is sequentially written to a backup memory area in ascending order of the addresses of the data, and the method comprises:

acquiring a write address corresponding to a write operation command from an operating system;

acquiring a maximum address of data that has been read from the raw memory area through the memory backup process and a maximum address of data that has been written to a backup memory area through the memory backup process; and

when the write address is smaller than or equal to the maximum address of the data that has been read from the raw memory area and is greater than the maximum address of the data that has been written to the backup memory area writing data to the write address in the raw memory area according to the write operation command, and deducting a set value from the write address to obtain an initial address for the memory backup process to subsequently read data from the raw memory area.

2. The method according to claim 1 , further comprising:

when the write address is greater than the maximum address of the data that has been read from the raw memory area, then writing data to the write address in the raw memory area according to the write operation command.

3. The method according to claim 1 , further comprising:

when the write address is smaller than or equal to the maximum address of the data that has been written to the backup memory area, then writing data to the write address in the backup memory area according to the write operation command.

4. The method according to claim 1 , further comprising:

acquiring a read address corresponding to a read operation command, and reading data from the read address in the raw memory area according to the read operation command.

5. A non-transitory computer readable medium storing codes for processing a system command during a memory backup process, wherein through the memory backup process, data is sequentially read from a raw memory area in ascending order of addresses of the data and the read data is sequentially written to a backup memory area in ascending order of the addresses of the data, and the codes when executed by a processor of a computer perform:

acquiring a write address corresponding to a write operation command from an operating system;

acquiring a maximum address of data that has been read from the raw memory area through the memory backup process and a maximum address of data that has been written to a backup memory area through the memory backup process; and

when the write address is smaller than or equal to the maximum address of the data that has been read from the raw memory area and is greater than the maximum address of the data that has been written to the backup memory area, writing data to the write address in the raw memory area according to the write operation command, and deducting a set value from the write address to obtain an initial address for the memory backup process to subsequently read data from the raw memory area.

6. The non-transitory computer readable medium according to claim 5 , wherein the codes when executed by a processor of a computer further performs:

when the write address is greater than the maximum address of the data that has been read from the raw memory area, then writing data to the write address in the raw memory area according to the write operation command.

7. The non-transitory computer readable medium according to claim 5 , wherein the codes when executed by a processor of a computer further performs:

when the write address is smaller than or equal to the maximum address of the data that has been written to the backup memory area, then writing data to the write address in the backup memory area according to the write operation command.

8. The non-transitory computer readable medium according to claim 5 , wherein the codes when executed by a processor of a computer further performs:

acquiring a read address corresponding to a read operation command, and reading data from the read address in the raw memory area according to the read operation command.

9. A computer, comprising:

a memory;

a memory controller; and

a processor, wherein:

the memory is configured to store data, and the memory comprises a raw memory area and a backup memory area;

the processor is configured to run an operating system, wherein a write operation command is sent by the operating system to the memory controller for writing data to the memory;

the memory controller is configured to:

run a memory backup process, wherein through the memory backup process, data is sequentially read from the raw memory area in ascending order of addresses of the data and the read data is sequentially written to the backup memory area in ascending order of the addresses of the data;

acquire a write address corresponding to a write operation command from the operating system;

acquire a maximum address of data that has been read from the raw memory area through the memory backup process and a maximum address of data that has been written to the backup memory area through the memory backup process; and

when the write address is smaller than or equal to the maximum address of the data that has been read from the raw memory area and is greater than the maximum address of the data that has been written to the backup memory area, write data to the write address in the raw memory area according to the write operation command, and deduct a set value from the write address to obtain an initial address for the memory backup process to subsequently read data from the raw memory area.

10. The computer according to claim 9 , wherein the memory controller is further configured to:

when the write address is greater than the maximum address of the data read from the raw memory area, then write data to the write address in the raw memory area according to the write operation command.

11. The computer according to claim 9 , wherein the memory controller is further configured to:

when the write address is smaller than or equal to the maximum address of the data written to the backup memory area, then write data to the write address in the backup memory area according to the write operation command.

12. The computer according to claim 9 , wherein the memory controller is further configured to:

acquire a read address corresponding to a read operation command, and read data from the read address in the raw memory area according to the read operation command.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2022
From: HUAWEI TECHNOLOGIES CO., LTD.
To: XFUSION DIGITAL TECHNOLOGIES CO., LTD.
Reel/Frame 058682/0312 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2013
From: CHENG, YONGBO; HE, CHENGHONG; LAN, KEJIA
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 032064/0817 →
Continuity (2)
Continuation PCTCN2011076954 · Jul 7, 2011
Related Publication 20140164724A1 · Jun 12, 2014