Output power control for RF digital-to-analog converter
View Patent ↗Methods and apparatus, including computer program products, are provided for power control of RF DACs. In one aspect there is provided an apparatus. The apparatus may include a multiphase clock generator to provide tunable multiphase clock signals including a first clock signal and a second clock signal; and a radio frequency digital-to-analog converter including a first input to receive digital input data, a second input to receive the first clock signal and the second clock signal, and an output to provide an analog output signal, wherein when at least one of a phase difference and a time difference between the first clock signal and the second clock signal is varied, a gain of the analog output signal is varied. Related apparatus, systems, methods, and articles are also described.
1. An apparatus comprising:
a multiphase clock generator to provide tunable multiphase clock signals including a first clock signal and a second clock signal; and
a radio frequency digital-to-analog converter including a first input to receive digital input data, a second input to receive the first clock signal and the second clock signal, and an output to provide an analog output signal, wherein when at least one of a phase difference and a time difference between the first clock signal and the second clock signal is varied, a gain of the analog output signal is varied.
2. The apparatus of claim 1 , wherein the radio frequency digital-to-analog converter comprises a voltage-mode radio frequency digital-to-analog converter.
3. The apparatus of claim 1 , wherein the multiphase clock generator selects from among a plurality of different clock signals including the first clock signal and the second clock signal.
4. The apparatus of claim 3 , wherein a control signal tunes the multiphase clock signals by at least selecting at least two of the plurality of different clock signals to serve as the first clock signal and the second clock signal.
5. The apparatus of claim 3 , wherein the multiphase clock generator includes at least one delay-locked loop to provide the plurality of different clock signals.
6. The apparatus of claim 5 , wherein the at least one delay-locked loop includes a plurality of delay cells, each of which provides at least one of the plurality of different clocks.
7. The apparatus of claim 1 , wherein when the phase difference between the first clock signal and the second clock signal is increased, the gain of the analog output signal is increased, and wherein when the phase difference between the first clock signal and the second clock signal is decreased, the gain of the analog output signal is decreased.
8. The apparatus of claim 1 further comprising:
a filter coupled to the radio frequency digital-to-analog converter to filter the analog output signal before transmission via an antenna.
9. The apparatus of claim 1 , wherein the radio frequency digital-to-analog converter provides at least one of a digital-to-analog conversion of the digital input data, a frequency up-conversion, and a power amplification.
10. The apparatus of claim 1 , wherein at least one of a user equipment, a wireless access point, and a base station includes a transmitter comprising the apparatus.
11. The apparatus of claim 1 , wherein the first clock signal and the second clock signal comprise differential signals.
12. A method comprising:
generating, at a multiphase clock generator, tunable multiphase clock signals including a first clock signal and a second clock signal; and
receiving, at a radio frequency digital-to-analog converter, digital input data, first clock signal, and the second clock signal; and
providing, by the radio frequency digital-to-analog converter, an analog output signal representative of the digital input data, wherein when at least one of a phase difference and a time difference between the first clock signal and the second clock signal is varied, a gain of the analog output signal is varied.
13. The method of claim 12 , wherein the radio frequency digital-to-analog converter comprises a voltage-mode radio frequency digital-to-analog converter.
14. The method of claim 12 , wherein the multiphase clock generator selects from among a plurality of different clock signals including the first clock signal and the second clock signal.
15. The method of claim 14 , wherein a control signal tunes the multiphase clock signals by at least selecting at least two of the plurality of different clock signals to serve as the first clock signal and the second clock signal.
16. The method of claim 14 , wherein the multiphase clock generator includes at least one delay-locked loop to provide the plurality of different clock signals.
17. The method of claim 16 , wherein the at least one delay-locked loop includes a plurality of delay cells, each of which provides at least one of the plurality of different clocks.
18. The method of claim 12 , wherein when the phase difference between the first clock signal and the second clock signal is increased, the gain of the analog output signal is increased, and wherein when the phase difference between the first clock signal and the second clock signal is decreased, the gain of the analog output signal is decreased.
19. The method of claim 12 , wherein the radio frequency digital-to-analog converter provides at least one of a digital-to-analog conversion of the digital input data, a frequency up-conversion, and a power amplification.
20. A non-transitory computer-readable storage medium include computer program code which when executed causes operations comprising:
generating, at a multiphase clock generator, tunable multiphase clock signals including a first clock signal and a second clock signal; and
receiving, at a radio frequency digital-to-analog converter, digital input data, first clock signal, and the second clock signal; and
providing, by the radio frequency digital-to-analog converter, an analog output signal representative of the digital input data, wherein when at least one of a phase difference and a time difference between the first clock signal and the second clock signal is varied, a gain of the analog output signal is varied.