IP Library Patent Application 14140325
Patent Application
App. No. 14/140,325

SEMICONDUCTOR DEVICE

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Patent No.
US None
App. No.
14/140,325
Abstract

A semiconductor device includes a first hetero-junction body in which a first channel layer and a first barrier layer are bonded together; a second hetero-junction body in which a second channel layer formed on the first hetero-junction body and a second barrier layer are bonded together; a gate electrode in Schottky contact with the second barrier layer; and source and drain electrodes in ohmic contact with the first and second hetero-junction bodies. At least one of the first and second channel layers has such a thickness that an electron concentration in a 2DEG layer formed in the channel layer is not reduced.

Claims (28)

1 . A semiconductor device comprising:

a first hetero-junction body in which a first nitride semiconductor layer and a second nitride semiconductor layer having a greater band gap than that of the first nitride semiconductor layer are bonded together;

a second hetero-junction body in which a third nitride semiconductor layer formed on the first hetero-junction body and a fourth nitride semiconductor layer having a greater band gap than that of the third nitride semiconductor layer are bonded together;

a first electrode in Schottky contact with at least the fourth nitride semiconductor layer; and

a second electrode in ohmic contact with the first and second hetero-junction bodies,

wherein the first nitride semiconductor layer has such a thickness that an electron concentration in a 2-dimentional electron gas layer formed in the first nitride semiconductor layer is not reduced, or

the third nitride semiconductor layer has such a thickness that an electron concentration in a 2-dimentional electron gas layer formed in the third nitride semiconductor layer is not reduced.

2 . The semiconductor device of claim 1 , wherein

the thickness of the first nitride semiconductor layer or the third nitride semiconductor layer is equal to or greater than 80 nm.

3 . The semiconductor device of claim 1 , wherein

the third nitride semiconductor layer has, at an interface at which the third nitride semiconductor layer contacts the second nitride semiconductor layer, a first region doped with an n-impurity.

4 . The semiconductor device of claim 3 , wherein

the third nitride semiconductor layer has a second region formed between the first region and the fourth nitride semiconductor layer so as to contact the first region and doped with a p-impurity.

5 . The semiconductor device of claim 1 , wherein

the first electrode is a gate electrode,

the second electrode includes a source electrode formed in a region extending over the first and second hetero-junction bodies on one side of the gate electrode, and a drain electrode formed in a region extending over the first and second hetero-junction bodies on the other side of the gate electrode, and

the semiconductor device is operated as a field effect transistor.

6 . The semiconductor device of claim 5 , wherein

the first electrode is a first gate electrode,

a substrate configured to hold the first hetero-junction body is further provided,

the substrate is provided in a region of the semiconductor device opposite to the first gate electrode, and is formed with an opening through which part of the first hetero-junction body is exposed, and

a second gate electrode contacting at least the part of the first hetero-junction body exposed through the opening is formed on the substrate.

7 . The semiconductor device of claim 1 , wherein

the first electrode is an anode electrode,

the second electrode is a cathode electrode, and

the semiconductor device is operated as a Schottky barrier diode.

8 . The semiconductor device of claim 7 , wherein

the thickness of the third nitride semiconductor layer is equal to or less than 350 nm.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2014
From: MURATA, TOMOHIRO; SHIBATA, DAISUKE; UEDA, TETSUZO
To: PANASONIC CORPORATION
Reel/Frame 032387/0530 →