IP Library Granted Patent US 9,041,475
Granted Patent B1
US 9,041,475 · App. 14/141,730 · Granted May 26, 2015

Thermally stable low power chip clocking

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Quick Facts
Patent No.
US 9,041,475
App. No.
14/141,730
Granted
May 26, 2015
Kind
B1
Abstract

A method of controlling an integrated circuit chip including first and second clock sources, the first clock source being more thermally stable and having a higher power consumption, the integrated circuit chip being operable in a first mode in which the first clock source is inactive and the second clock source active and in a second mode in which the first and second clock sources are active, the method including operating the integrated circuit chip in the first mode; taking a measurement indicative of temperature; if the measurement indicates that the temperature is outside of a temperature band: activating the first clock source so as to operate the integrated circuit chip in the second mode; recalibrating the second clock source against the first clock source; and following the recalibration, deactivating the first clock source so as to return the integrated circuit chip to the first mode.

Claims (43)

1. A method of controlling an integrated circuit chip comprising a first clock source and a second clock source, the first clock source being more thermally stable and having a higher power consumption than the second clock source, the integrated circuit chip being operable in a first mode in which the first clock source is inactive and the second clock source is active and being operable in a second mode in which the first clock source is active and the second clock source is active, the method comprising:

operating the integrated circuit chip in the first mode;

periodically taking a measurement indicative of temperature;

only if the measurement indicates that the temperature is outside of a temperature band:

activating the first clock source so as to operate the integrated circuit chip in the second mode;

recalibrating the second clock source against the first clock source; and

following the recalibration:

taking a measurement indicative of temperature in the second mode;

determining upper and lower bounds indicative of a maximum temperature and a minimum temperature of an updated temperature band; and

deactivating the first clock source so as to return the integrated circuit chip to the first mode,

wherein for subsequent measurements indicative of temperature in the first mode, if the measurement indicates that the temperature is outside of the updated temperature band, performing the activating, recalibrating and deactivating steps.

2. A method as claimed in claim 1 , wherein the second clock source comprises a transistor, and wherein the measurement indicative of temperature is a measurement of voltage drop over the transistor.

3. A method as claimed in claim 1 , wherein each periodic measurement indicative of temperature is a measurement indicative of the change in absolute temperature since the last absolute temperature measurement.

4. A method as claimed in claim 1 , comprising determining the upper and lower bounds in dependence on a predetermined profile of the error of the second clock source against temperature.

5. A method as claimed in claim 4 , comprising determining the upper and lower bounds to correspond to a predetermined maximum error of the second clock source.

6. A method as claimed in claim 5 , wherein the integrated circuit chip operates in accordance with a radio protocol, and the predetermined maximum error of the second clock source is specified by that radio protocol.

7. A method as claimed in claim 6 , wherein the radio protocol is Bluetooth.

8. A method as claimed in claim 1 , wherein the temperature indicated by the measurement taken in the second mode is encompassed within the maximum and minimum temperatures of the updated temperature band.

9. A method as claimed in claim 1 , comprising prior to operating the integrated circuit chip in the first mode:

operating the integrated circuit chip in the second mode;

taking a temperature measurement in the second mode; and

determining the interval between the periodic measurements indicative of temperature during the first mode based on the temperature measurement in the second mode.

10. A method as claimed in claim 9 , comprising determining the interval between the periodic measurements indicative of temperature in dependence on a predetermined profile of the error of the second clock source against temperature, such that the wider the temperature band which corresponds to a predetermined maximum error of the second clock source from the temperature measurement in the second mode, the larger the interval between the periodic measurements indicative of temperature.

11. An integrated circuit chip comprising:

a first clock source and a second clock source, the first clock source being more thermally stable and having a higher power consumption than the second clock source, the integrated circuit chip operable in a first mode in which the first clock source is inactive and the second clock source is active and operable in a second mode in which the first clock source is active and the second clock source is active;

a sensor configured to periodically take measurements indicative of temperature when the integrated circuit chip is operating in the first mode, wherein the sensor is configured such that the interval between periodic measurements indicative of temperature is adjustable;

a controller configured to, if the measurement indicates that the temperature is outside of a temperature band:

activate the first clock source so as to operate the integrated circuit chip in the second mode;

recalibrate the second clock source against the first clock source; and

following the recalibration, deactivate the first clock source so as to return the integrated circuit chip to the first mode.

12. An integrated circuit chip as claimed in claim 11 , wherein the first clock source is a crystal oscillator.

13. An integrated circuit chip as claimed in claim 11 , wherein the second clock source is a low power oscillator.

14. An integrated circuit chip as claimed in claim 11 , wherein the sensor comprises a transistor, and wherein the measurement indicative of temperature is a measurement of voltage drop over the transistor.

15. An integrated circuit chip as claimed in claim 11 , further comprising a third clock source configured to clock the sensor, wherein the sensor is configured to take a measurement indicative of temperature when clocked by the third clock source.

16. An integrated circuit chip as claimed in claim 11 , configured to operate in accordance with the Bluetooth protocol.

17. An integrated circuit chip comprising:

a first clock source and a second clock source, the first clock source being more thermally stable and having a higher power consumption than the second clock source, the integrated circuit chip operable in a first mode in which the first clock source is inactive and the second clock source is active and operable in a second mode in which the first clock source is active and the second clock source is active;

a sensor configured to take a measurement indicative of temperature when the integrated circuit chip is operating in the first mode;

a controller configured to, if the measurement indicates that the temperature is outside of a temperature band:

activate the first clock source so as to operate the integrated circuit chip in the second mode;

recalibrate the second clock source against the first clock source; and

following the recalibration, deactivate the first clock source so as to return the integrated circuit chip to the first mode;

wherein the integrated circuit chip further comprises a second sensor is configured to be operable in the second mode and inactive in the first mode, the second sensor configured to take a temperature measurement in the second mode.

Assignments (2)
CHANGE OF NAME Recorded Sep 22, 2015
From: CAMBRIDGE SILICON RADIO LIMITED
To: QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.
Reel/Frame 036663/0211 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2014
From: WILLIAMS, PETER ANDREW REES
To: CAMBRIDGE SILICON RADIO LIMITED
Reel/Frame 031939/0191 →