Display panel and method of manufacturing the same
View Patent ↗A display panel includes a gate line which extends substantially in a first direction, a first data line which extends substantially in a second direction substantially perpendicular to the first direction, a second data line spaced apart from the first data line in the first direction and which extends substantially in the second direction, a high pixel electrode disposed between the first data line and the second data line and disposed adjacent to the gate line, a low pixel electrode disposed between the first data line and the second data line and disposed opposite to the high pixel electrode with reference to the gate line, a high storage line which extends substantially in the second direction and overlaps the high pixel electrode, and a low storage line which extends substantially in the second direction and overlaps the low pixel electrode.
1. A display panel comprising:
a first gate line which extends substantially in a first direction;
a first data line which extends substantially in a second direction, which is substantially perpendicular to the first direction;
a second data line spaced apart from the first data line in the first direction, and which extends substantially in the second direction;
a high pixel electrode disposed between the first data line and the second data line, and disposed adjacent to the first gate line;
a low pixel electrode disposed between the first data line and the second data line, and disposed opposite to the high pixel electrode with reference to the first gate line;
a high storage line which extends substantially in the second direction and overlaps the high pixel electrode; and
a low storage line which extends substantially in the second direction and overlaps the low pixel electrode.
2. The display panel of claim 1 , further comprising:
a first switching element electrically connected to the first gate line, the first data line and the high pixel electrode;
a second switching element electrically connected to the first gate line, the first data line and the low pixel electrode; and
a third switching element electrically connected to the first gate line, the second switching element and the high storage line.
3. The display panel of claim 1 , wherein
the high storage line comprises:
a first high storage line which extends substantially in the first direction; and
a second high storage line which extends substantially in the second direction, and
the low storage line comprises:
a first low storage line which extends substantially in the first direction; and
a second low storage line which extends substantially in the second direction.
4. The display panel of claim 3 , wherein
the high pixel electrode comprises:
a first stem which extends substantially in the first direction;
a second stem which extends substantially in the second direction; and
a plurality of branches which extends from the first and second stems,
wherein the high pixel electrode has a slit structure defined by the branches,
the low pixel electrode comprises:
a first stem which extends substantially in the first direction;
a second stem which extends substantially in the second direction; and
a plurality of branches which extends from the first and second stems,
wherein the low pixel electrode has a slit structure defined by the branches,
the second high storage line overlaps the second stem of the high pixel electrode, and
the second low storage line overlaps the second stem of the low pixel electrode.
5. The display panel of claim 3 , wherein
the first high storage line is disposed between the first data line and the second data line, and does not overlap the first data line and the second data line, and
the low storage line is disposed between the first data line and the second data line, and does not overlap the first data line and the second data line.
6. The display panel of claim 1 , further comprising:
a connecting electrode which electrically connects the high storage line to the low storage line.
7. The display panel of claim 1 , further comprising:
a common electrode disposed opposite to the high pixel electrode and the low pixel electrode; and
a liquid crystal layer disposed between the high and low pixel electrodes, and the common electrode, respectively.
8. The display panel of claim 1 , further comprising:
a second gate line connected to a pixel adjacent to a pixel connected to the first gate line in the second direction,
wherein the second data line is electrically connected to the pixel connected to the second gate line.
9. The display panel of claim 8 , wherein a same gate signal is applied to the first gate electrode and the second gate electrode.
10. The display panel of claim 1 , wherein
a side portion of the high pixel electrode overlaps the first and second data lines, and
a side portion of the low pixel electrode overlaps the first and second data lines.
11. The display panel of claim 1 , wherein the high storage line, the low storage line and the first gate line are disposed in a same layer as each other.
12. The display panel of claim 1 , further comprising:
a first driving part disposed at a side portion of the display panel; and
a storage compensating line electrically connected to the first driving part, electrically connected to the high and low storage lines, and disposed along a side portion of the display panel.
13. The display panel of claim 12 , wherein the storage compensating line comprises:
a first portion disposed opposite to the first driving part and which extends substantially in the first direction; and
a second portion which connects the first portion to the first driving part and extends substantially in the second direction.
14. A method of manufacturing a display panel, the method comprising:
providing a gate pattern comprising a gate line, a high storage line and a low storage line on a substrate;
providing a first insulation layer on the substrate, on which the gate pattern is provided;
providing a data pattern comprising a first data line and a second data line on the first insulation layer;
providing a second insulation layer on the first insulation layer, on which the data pattern is provided; and
providing a high pixel electrode, a low pixel electrode and a connecting electrode, which connects the high storage line and the low storage line, on the second insulation layer.
15. The method of claim 14 , wherein
the gate line extends substantially in a first direction,
the first data line extends substantially in a second direction, which is substantially perpendicular to the first direction,
the second data line is spaced apart from the first data line in the first direction, and extends substantially in the second direction,
the high pixel electrode is disposed between the first data line and the second data line and disposed adjacent to the gate line,
the low pixel electrode is disposed between the first data line and the second data line and disposed opposite to the high pixel electrode with reference to the gate line,
the high storage line extends substantially in the second direction, and overlaps the high pixel electrode, and
the low storage line extends substantially in the second direction, and overlaps the low pixel electrode.
16. The method of claim 15 , further comprising:
providing a first switching element, which is electrically connected to the gate line, the first data line and the high pixel electrode;
providing a second switching element, which is electrically connected to the gate line, the first data line and the low pixel electrode; and
providing a third switching element, which is electrically connected to the gate line, the second switching element and the high storage line.
17. The method of claim 16 , wherein
the high storage line comprises a first high storage line which extends substantially in the first direction, and a second high storage line which extends substantially in the second direction, and
the low storage line comprises a first low storage line which extends substantially in the first direction, and a second low storage line which extends substantially in the second direction.
18. The method of claim 16 , further comprising:
providing a color filter on the first insulation layer, on which the data pattern is provided, before the providing the second insulation layer.
19. The method of claim 16 , further comprising:
forming a first contact hole through the first insulation layer to expose the high storage line before the providing the data pattern,
wherein the high storage line is connected to a third source electrode of the third switching element through the first contact hole.
20. The method of claim 19 , further comprising:
forming a second contact hole through the second insulation layer to expose the third source electrode of the third switching element and a third contact hole through the second and first insulation layer to expose the low storage line before the providing the connecting electrode,
wherein the connecting electrode is electrically connected to the high storage line and the third source electrode of the third switching through the first and second contact hole, and is electrically connected to the low storage line through the third contact hole.