Semiconductor device and method of manufacturing the semiconductor device

1. A method of manufacturing a semiconductor device, comprising:

forming a plurality of fin structures on a substrate, the plurality of fin structures including a diffusion region;

forming an epitaxial layer on the plurality of fin structures in an area of the diffusion region such that a cross-section of the epitaxial layer includes a diamond-shaped facet comprising a {111} crystal orientation on the plurality of fin structures;

growing the diamond-shaped facet of the epitaxial layer such that a height of the upper surface of the epitaxial layer over plurality of fin structures is substantially equal to the height of the upper surface of the epitaxial layer between the plurality of fin structures; and

planarizing the upper surface of the epitaxial layer by etch back.

2. The method of claim 1 , wherein the growing of the diamond-shaped facet of the epitaxial layer comprises growing the diamond-shaped facet such that a first growth front of the epitaxial layer on a first fin structure of the plurality of fin structures contacts a second growth front of the epitaxial layer on a second fin structure of the plurality of fin structures.

3. The method of claim 2 , further comprising:

concurrently with the planarizing of the upper surface of the epitaxial layer, etching back a lateral side surface of the epitaxial layer at an edge of the plurality of fin structures.

4. The method of claim 3 , wherein the substrate comprises a buried oxide layer, and

wherein the etching back of the lateral side surface of the epitaxial layer comprises etching back the lateral side surface of the epitaxial layer such that the lateral side surface extends from the buried oxide layer to the upper surface of the epitaxial layer, and is substantially perpendicular to the upper surface of the epitaxial silicon layer.

5. The method of claim 4 , wherein the etching back of the lateral side surface of the epitaxial layer comprises etching back the lateral side surface of the epitaxial layer such that a distance between the lateral side surface and an outermost fin structure of the plurality of fin structures is 10 nm or less.

6. The method of claim 1 , wherein the planarizing of the upper surface of the epitaxial layer is performed after the forming of the epitaxial layer without interruption and in the same chamber.

7. The method of claim 1 , wherein the planarizing of the upper surface of the epitaxial layer comprises etching back the upper surface of the epitaxial layer such that a height of the upper surface of the epitaxial layer is greater than a height of an upper surface of the plurality of fin structures.

8. The method of claim 1 , wherein the planarizing of the upper surface of the epitaxial layer comprises etching back the upper surface of the epitaxial layer such that a height of the upper surface of the epitaxial layer is less than a height of an upper surface of the plurality of fin structures.

9. The method of claim 1 , further comprising:

after the planarizing of the epitaxial layer, forming an other epitaxial layer on the upper surface of the epitaxial layer to tune a height of the diffusion region.

10. The method of claim 9 , wherein the epitaxial layer comprises a first dopant type and a first dopant amount, and the other epitaxial layer comprises a second dopant type and a second dopant amount, and

wherein at least one of the first dopant type is different from the second dopant type, and the first dopant amount is different from the second dopant amount.

11. The method of claim 1 , further comprising:

depositing a metal layer on the upper surface of the epitaxial layer; and

heating the substrate to silicide the upper surface of the epitaxial layer.

12. The method of claim 1 , wherein the planarizing of the upper surface of the epitaxial layer comprises reducing the height of the upper surface of the epitaxial layer such that a distance between an upper surface of the plurality of fin structures and the upper surface of the epitaxial layer is at least 10 nm.

13. The method of claim 1 , wherein the planarizing of the upper surface of the epitaxial layer comprises simultaneously decreasing a surface roughness of the upper surface, reducing a thickness of the epitaxial layer, and reducing a lateral width of the epitaxial layer.

14. A method of manufacturing a semiconductor device, comprising:

forming a plurality of fin structures on a substrate, the plurality of fin structures including a diffusion region;

forming an epitaxial layer on the plurality of fin structures in an area of the diffusion region such that a cross-section of the epitaxial layer includes a diamond-shaped facet comprising a {111} crystal orientation on the plurality of fin structures;

stopping the forming of the epitaxial layer upon a first growth front of the epitaxial layer on a first fin structure of the plurality of fin structures contacting a second growth front of the epitaxial layer on a second fin structure of the plurality of fin structures; and

planarizing the upper surface of the epitaxial layer by reflow annealing.

15. The method of claim 14 , wherein the planarizing of the upper surface of the epitaxial layer comprises reflowing an upper portion of the diamond-shaped facet of the epitaxial layer to a location between the plurality of fin structures.

16. The method of claim 14 , wherein the planarizing of the upper surface of the epitaxial layer is performed after the forming of the epitaxial layer without interruption and in the same chamber.