Systems and methods for memory management in a dynamic translation computer system
View Patent ↗Systems and methods for managing memory in a dynamic translation computer system are provided. Embodiments may include receiving an instruction packet and processing the instruction packet. The instruction packet may include one or more instructions for obtaining a block of virtual memory for use in an emulated operating environment from a slab of virtual memory in a host environment, maintaining a mapping between the block of virtual memory and physical memory when the block is returned to the host environment, and for filling the block of virtual memory with zeros and a pattern based, at least in part, on a detected fill type.
1. A computer implemented method, the computer having a processor, a block of virtual memory, and physical memory, comprises:
obtaining, by the processor, the block of virtual memory for use in an emulated operating environment from a slab of virtual memory in a host environment executing the emulated operating environment;
detecting a fill pattern of the block of virtual memory;
maintaining, by the processor, a mapping between the block of virtual memory and the physical memory upon returning the block of virtual memory to the slab of virtual memory, wherein maintaining the mapping between the block of virtual memory and the physical memory is based, at least in part, on the fill pattern of the block of virtual memory;
disabling local-timer interrupts;
receiving an inter-processor communication instruction packet, wherein the step of obtaining is initiated after receipt of the inter-processor communication instruction packet;
checking the inter-processor communication instruction packet for errors; and
re-initializing the mapping between the block of virtual memory and the physical memory based, at least in part, on the fill pattern of the block of virtual memory.
2. The computer implemented method of claim 1 , further comprising clearing the mapping between the block of virtual memory and the physical memory when the physical memory occupancy reaches or exceeds a threshold percentage.
3. A computer program product comprises:
a non-transitory computer-readable medium comprising code to perform the steps of:
obtaining a block of virtual memory for use in an emulated operating environment from a slab of virtual memory in a host environment;
detecting a fill pattern of the block of virtual memory;
maintaining a mapping between the block of virtual memory and physical memory upon returning the block of virtual memory to the slab of virtual memory, wherein maintaining the mapping between the block of virtual memory and the physical memory is based, at least in part, on the fill pattern of the block of virtual memory;
performing the step of disabling local-timer interrupts;
receiving an inter-processor communication instruction packet, wherein the step of obtaining is initiated after receipt of the inter-processor communication instruction packet;
checking the inter-processor communication instruction packet for errors; and
re-initializing the mapping between the block of virtual memory and the physical memory based, at least in part, on the fill pattern of the block of virtual memory.
4. The computer program product of claim 3 , wherein the medium further comprises code to perform the step of clearing the mapping between the block of virtual memory and the physical memory when the physical memory occupancy reaches or exceeds a threshold percentage.
5. An apparatus comprises:
a memory; and
a processor coupled to the memory, the processor configured to execute steps of:
obtaining a block of virtual memory for use in an emulated operating environment from a slab of virtual memory in a host environment;
detecting a fill pattern of the block of virtual memory;
maintaining a mapping between the block of virtual memory and physical memory upon returning the block of virtual memory to the slab of virtual memory, wherein maintaining the mapping between the block of virtual memory and the physical memory is based, at least in part, on the fill pattern of the block of virtual memory;
disabling local-timer interrupts;
receiving an inter-processor communication instruction packet, wherein the step of obtaining is initiated after receipt of the inter-processor communication instruction packet;
checking the inter-processor communication instruction packet for errors;
re-initializing the mapping between the block of virtual memory and the physical memory based, at least in part, on the fill pattern of the block of virtual memory.
6. The apparatus of claim 5 , in which the processor is further configured to perform the step of clearing the mapping between the block of virtual memory and the physical memory when the physical memory occupancy reaches or exceeds a threshold percentage.