Liquid crystal display
A liquid crystal display, including: a first insulation substrate; a gate line and a data line positioned on the first insulation substrate and crossing each other; a first passivation layer positioned on the gate line and the data line; a pixel electrode positioned on the first passivation layer; an alignment layer positioned on the pixel electrode; a second insulation substrate facing the first insulation substrate; and a liquid crystal positioned between the first insulation substrate and the second insulation substrate. A thickness of the alignment layer is larger than a thickness of the pixel electrode.
1. A liquid crystal display, comprising:
a first substrate;
a gate line disposed on the first substrate;
a data line disposed on the first substrate and crossing the gate line;
a first passivation layer disposed on the gate line and the data line;
a pixel electrode disposed on the first passivation layer;
an alignment layer disposed on the pixel electrode;
a second substrate facing the first substrate; and
a liquid crystal layer disposed between the first substrate and the second substrate,
wherein:
a phase transition temperature of the liquid crystal layer is in a range of about 85° C. to about 110° C.;
a thickness ratio of the alignment layer to the pixel electrode is in a range of about 1.4to about 2.0; and
a black luminance of the liquid crystal display is in a range of 0.14 to 0.16.
2. The liquid crystal display of claim 1 , wherein an elastic coefficient of the liquid crystal layer is in a range of 14 to 19, at 30° C.
3. The liquid crystal display of claim 1 , wherein:
the pixel electrode comprises a first subpixel electrode and a second subpixel electrode that are disposed on opposite sides of the gate line; and
the liquid crystal display further comprises a first capacitor connected to the first subpixel electrode and a second capacitor connected to the second subpixel electrode.
4. The liquid crystal display of claim 3 , further comprising transistors configured to charge different voltages in the first and second capacitors.
5. The liquid crystal display of claim 1 , wherein the pixel electrode comprises a stem and branches extending from the stem.
6. The liquid crystal display of claim 1 , further comprising a thin film transistor connected to the gate line and the data line.
7. The liquid crystal display of claim 6 , wherein:
the pixel electrode comprises a first subpixel electrode and a second subpixel electrode that are spaced apart from each other with the gate line disposed therebetween; and
the thin film transistor comprises a first thin film transistor connected to the first subpixel electrode and a second thin film transistor connected to the second subpixel electrode.
8. The liquid crystal display of claim 6 , wherein the first subpixel electrode and the second subpixel electrode each comprise a stem and branches extending from the stem.
9. The liquid crystal display of claim 1 , further comprising a planar common electrode disposed on the second substrate.
10. The liquid crystal display of claim 1 , further comprising a color filter disposed between the first passivation layer and the pixel electrode.
11. The liquid crystal display of claim 10 , further comprising a light blocking member disposed on the second substrate,
wherein the color filter and the light blocking member are partially overlapped with each other.
12. A liquid crystal display, comprising:
a first substrate;
a gate line disposed on the first substrate;
a data line disposed on the first substrate and crossing the gate line;
a first passivation layer disposed on the gate line and the data line;
a pixel electrode disposed on the first passivation layer;
an alignment layer disposed on the pixel electrode;
a second substrate facing the first substrate; and
a liquid crystal layer disposed between the first substrate and the second substrate,
wherein:
a phase transition temperature of the liquid crystal layer is in a range of about 85° C. to about 110° C.;
a thickness of the pixel electrode is about 450 Å;
a thickness ratio of the alignment layer to the pixel electrode is about 1.2; and
a black luminance of the liquid crystal display is in a range of 0.14 to 0.16.