IP Library Granted Patent US 9,378,135
Granted Patent B2
US 9,378,135 · App. 14/149,993 · Granted Jun 28, 2016

Method and system for data storage

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Quick Facts
Patent No.
US 9,378,135
App. No.
14/149,993
Granted
Jun 28, 2016
Kind
B2
Abstract

A system and method of storing data in a semiconductor-type non-volatile memory is described, where a physical storage address of data is made available to a user application such as a file system and where characteristics of the memory system that may be allocated on a physical or a logical basis to a user are separately characterizable as to performance, size, redundancy, or the like. A read request to the memory system may be serviced by accessing the physical address included in the read request rather than using a logical-to-physical address lookup in the memory system. Garbage collection operations may be performed on a virtual-physical-block basis to preserve the relationship between the physical address known to the user and the actual physical location of the data.

Claims (87)

1. A method of managing storage of data, including:

providing a nonvolatile memory device for storing data, the non-volatile memory device having a processor, volatile memory and non-volatile memory the processor capable of accepting a first type of read command and a second type of read command; and

configuring the processor for:

interpreting a read data command from a user to determine whether the read data command is a first type of read data command or a second type of read data command, and

wherein, the read data command is of the first type when the command includes a logical address and does not include a physical address in the nonvolatile memory at which the data is stored;

the read data command is of the second type when the read data command includes at least the physical address in the nonvolatile memory at which the data is stored in memory; and,

responsive to the first type of read data command, determining the physical address of the data, retrieving data from the physical address in the nonvolatile memory and returning the data to the user; or

responsive to the second type of read command retrieving data from the physical address in the nonvolatile memory and returning the data to the user,

wherein a relationship between the logical address and the physical address is maintained in an indirection table in the nonvolatile memory device.

2. The method of claim 1 , further comprising:

reading metadata for retrieved data;

comparing at least a portion of the metadata for retrieved data with at least a portion of metadata in the first or the second type of read command: and

either,

returning the retrieved data to the user if the portions of the metadata of retrieved data and the metadata of the first or the second type of read command match; or,

returning an error message to the user if the portions of the metadata of retrieved data and the metadata of the first or the second type of read command do not match.

3. A method of managing data storage in a memory, including:

providing a nonvolatile memory device for storing data, the non-volatile memory device having a processor, volatile memory and non-volatile memory;

configuring the processor for:

interpreting a write command from a user to determine whether the write command is a first type or a second type,

wherein the write command is of the first type when the command includes a logical address and does not include a physical address where the data is to be stored; and

the write command is of the second type when the write command includes at least a physical address at which the data is stored in the nonvolatile memory; and,

responsive to the write command of the first type, determining the physical address in the nonvolatile memory where data associated with the write command of the first type is to be stored in the nonvolatile memory, in accordance with a protocol, and associating the physical address with the logical address in an indirection table; and

responsive to the write command of second type, determining a physical address in the nonvolatile memory where data associated with the write command of the second type is to be stored, in accordance with a protocol, and including the physical address in a response message to the user,

wherein the indirection table is maintained in the nonvolatile memory device.

4. The method of claim 3 , further comprising:

writing data associated with the first or the second type of write command to the nonvolatile memory; and

writing metadata associated with the first or the second type of write command to the nonvolatile memory device.

5. The method of claim 3 , further comprising:

using metadata of the second type of write command; and

comparing a portion of the metadata of the second type of write command with a portion of the metadata associated with the data stored at the physical address in the nonvolatile memory provided in the second type of write command; and,

performing the step of determining a physical address responsive to the second type of write command if the portion of the metadata of the second type write command matches the portion of the metadata stored at the physical address in the nonvolatile memory specified by the second type of write command; or

returning an error message to the user if the portion of the metadata of the second type of write command does not match the portion of the metadata stored at the physical address specified by the second type of write command.

6. The method of claim 3 , further comprising:

determining if second type of write command includes a logical address, and using the logical address as a portion of the metadata stored for the determined physical address, or

determining if the second type of write command does not include the logical address, and providing the logical address, associated with determined physical address, in a response message to a user; and

storing the provided logical address as metadata.

7. The method of claim 3 , wherein the metadata includes at least one of the logical address, a hash of the data stored at the logical address, a sequence number, or a time value.

8. The method of claim 3 , wherein the non-volatile memory is comprised of storage locations having physical addresses, groups of storage addresses comprising a block of memory of the plurality of blocks of memory of the nonvolatile memory, having a characteristic that the block of memory can be written once before being entirely erased.

9. The method of claim 8 , wherein a plurality of blocks form a group of blocks and the group of blocks are associated with one of a logical address range or a physical address range.

10. A device for storing data, comprising:

a nonvolatile semiconductor memory, the memory being organized as blocks, each block comprising a plurality of physical locations where a data is storable;

a processor having an associated buffer memory and communicating with a data interface and the nonvolatile semiconductor memory;

wherein the processor is configured to receive commands through the data interface and to manage storage of data in the nonvolatile semiconductor memory; and to

interpret a read data command from a user to determine whether the read data command is a first type of read data command or a second type of read data command,

wherein the read data command is of the first type when the command includes a logical address and does not include a physical address;

the read data command is of the second type when the command includes at least a physical address at which the data is stored in memory; and,

responsive to the first type of read data command, determine the physical address of the data, retrieve data from the physical address in the non-volatile memory and return the data to the user; or

responsive to the second type of read command, retrieve data from the physical address in the non-volatile memory and return the data to the user,

wherein a relationship between the logical address and the physical address is maintained in an indirection table.

11. The device of claim 10 , further comprising:

the processor configured to:

read metadata for retrieved data;

compare at least a portion of the metadata of retrieved data with at least a portion of metadata in the first or the second type of read command: and

either,

return the retrieved data to the user if the portions of the metadata of retrieved data and the metadata of the first or the second type of read command match; or,

return an error message to the user if the portions of the metadata of retrieved data and the metadata of the first of the second type of read command do not match.

12. The device of claim 11 , further comprising:

the processor configured to:

interpret a write data command from the user to determine whether the write data command is of the first type or the second type;

wherein the write data command is of the first type when the command includes the logical address and does not include a physical address where the data is to be stored; and

the write data command is of the second type when the command includes at least a physical address at which the data is stored in memory; and,

responsive to the command of the first type, determine the physical address in the non-volatile semiconductor memory where data associated with the first type of write data command is to be stored, in accordance with a protocol, and associate the physical address with the logical address in an indirection table; or,

responsive to the command of the second type, determine a physical address in the non-volatile semiconductor memory where data associated with the second type of write data command is to be stored, in accordance with a protocol, and include the physical address in a response message to the user.

13. The device of claim 12 , further comprising:

the processor configured to:

write data associated with the command of the first or the second type to the nonvolatile semiconductor memory; and

write metadata associated with the command of the first or the second to the nonvolatile semiconductor memory device.

14. The device of claim 11 , further comprising:

the processor configured to:

compare a portion of the metadata of the command of the second type with a portion of the metadata associated with the data stored at the physical address provided in the second type of write data command; and,

perform the step of determining a physical address responsive to the command of the second type if the portion of the metadata of the command of the second type matches the portion of the metadata stored at the physical address of the command of the second type; or

return the error message to the user if the portion of the metadata of the command of the second type does not match the portion of the metadata stored at the physical address of the command of the second type.

15. The device of claim 11 , further comprising:

the processor configured to:

determine if second type of write data command includes a first logical address, and use the first logical address as a portion of the metadata, or

determine if the second type of write data command does not include a first logical address, and provide a second logical address, associated with the determined physical address, in a response message to the user; and

store the second logical address as metadata for the data.

16. The device of claim 11 , wherein the metadata includes at least one of the logical addresses, a hash of the data stored at the one of the logical addresses, a sequence number, or a time value.

17. The device of claim 11 , wherein the non-volatile semiconductor memory is comprised of storage locations having physical addresses, groups of storage addresses comprising a block of memory, and having a characteristic that a block of memory can be written once before being entirely erased.

18. The device of claim 17 , wherein a plurality of blocks form a group of blocks and the group of blocks are associated with one of a logical address range or a physical address range.

19. The device of claim 11 , further comprising:

the processor configured to:

receive a TRIM command from the user, the TRIM command identifying at least one physical address to be disassociated from a corresponding logical address in the indirection table; and

set a status of the physical address associated with the logical address in the indirection table to invalid; and

disassociate the physical address from the logical address.

20. The device of claim 19 , wherein the TRIM command includes a base logical block address and an extent.

21. The device of claim 20 , wherein metadata of the extent, included in the TRIM command is compared with the metadata of the at least one physical address of the extent the physical address is status is set to invalid and the physical address is dissociated from the logical address when the metadata matches.

Assignments (8)
CORRECTIVE ASSIGNMENT TO REMOVE US PATENT NO. 9013874 PREVIOUSLY RECORDED UNDER REEL AND FRAME 064272/0249. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 17, 2024
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 068998/0780 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2023
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 064272/0249 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2021
From: SILICON VALLEY BANK
To: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC (F/K/A VIOLIN MEMORY, INC.))
Reel/Frame 056600/0186 →
CHANGE OF NAME Recorded May 25, 2021
From: VIOLIN SYSTEMS LLC
To: VSIP HOLDINGS LLC
Reel/Frame 056366/0849 →
RELEASE OF SECURITY INTEREST Recorded Feb 27, 2018
From: SILICON VALLEY BANK
To: VIOLIN SYSTEMS LLC
Reel/Frame 045044/0914 →
CHANGE OF NAME Recorded Dec 19, 2017
From: VIOLIN MEMORY, INC.
To: VIOLIN SYSTEMS LLC
Reel/Frame 044908/0680 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2015
From: BENNETT, JON C.R.
To: VIOLIN MEMORY, INC.
Reel/Frame 035188/0857 →
SECURITY INTEREST Recorded Aug 27, 2014
From: VIOLIN MEMORY, INC.
To: SILICON VALLEY BANK
Reel/Frame 033645/0834 →