Analogue-to-digital converter
View Patent ↗An analogue-to-digital converter for converting an analogue input signal into a digital output signal, the analogue-to-digital converter including two conversion paths, each configured to receive a version of the analogue input signal and convert it into a digital bit stream, a first feedback loop configured to provide feed-back, to both paths, that is indicative of a difference between the digital bit streams output by the two paths, and a second feedback loop configured to feed-back, to both paths, that is indicative of an average of the digital bit streams output by the two paths.
1. An analogue-to-digital converter for converting an analogue input signal into a digital output signal, the analogue-to-digital converter comprising:
a first conversion path configured to receive a first version of the analogue input signal and convert it into a first digital bit stream;
a second conversion path configured to receive a second version of the analogue input signal and convert it into a second digital bit stream;
a first feedback loop configured to provide feedback, to the first conversion path and the second conversion path, that is indicative of a difference between the first digital bit stream and the second digital bit stream; and
a second feedback loop configured to provide feedback, to the first conversion path and the second conversion path, that is indicative of an average of the first digital bit stream and the second digital bit stream.
2. The analogue-to-digital converter as claimed in claim 1 , wherein the first conversion path is configured to apply a positive gain to the first version of the analogue input signal, and wherein the second conversion path is configured to apply a negative gain to the second version of the analogue input signal.
3. The analogue-to-digital converter as claimed in claim 1 , further comprising a selection unit configured to form the digital output signal by alternately selecting between the first digital bit stream and the second digital bit stream.
4. The analogue-to-digital converter as claimed in claim 3 , wherein the selection unit is further configured to invert the second digital bit stream before selecting it to form the digital output signal.
5. The analogue-to-digital converter as claimed in claim 1 , wherein the first feedback loop is further configured to feed back a digital signal as the feedback that is indicative of a difference between the first digital bit stream and the second digital bit stream.
6. The analogue-to-digital converter as claimed in claim 1 , wherein the first feedback loop is further configured to feed back the digital output signal as the feedback that is indicative of the difference between the first digital bit stream and the second digital bit stream.
7. The analogue-to-digital converter as claimed in claim 1 , wherein the first feedback loop is further configured to feed back one of the first digital bit stream and the second digital bit stream as the feedback that is indicative of the difference between the first digital bit stream and the second digital bit stream.
8. The analogue-to-digital converter as claimed in claim 1 , wherein the second feedback loop is further configured to feedback an analogue feedback signal as the feedback that is indicative of the average of the first digital bit stream and the second digital bit stream.
9. The analogue-to-digital converter as claimed in claim 8 , wherein the second feedback loop is further configured to sum analogue versions of the first digital bit stream and the second digital bit stream to form the analogue feedback signal.
10. The analogue-to-digital converter as claimed in claim 1 , wherein the first conversion path comprises a first latch configured to output the first digital bit stream, the second conversion path comprises a second latch configured to output the second digital bit stream, and the second feedback loop comprises an integrator configured to sum an analogue signal input into the first latch and an analogue signal input into the second latch to generate at least part of the feedback that is indicative of the average of the first digital bit stream and the second digital bit stream.
11. The analogue-to-digital converter as claimed in claim 1 , wherein the first conversion path is further configured to subtract the feedback that is indicative of the difference and the feedback that is indicative of the average from the first version of the analogue input signal, and the second conversion path is further configured to subtract the feedback that is indicative of the difference and the feedback that is indicative of the average from the second version of the analogue input signal.
12. The analogue-to-digital converter as claimed in claim 1 , wherein the second feedback loop comprises a main loop and one or more local loops, the main loop being configured to provide integral control, the one or more local loops being configured to provide proportional control.
13. The analogue-to-digital converter as claimed in claim 12 , wherein the first conversion path comprises two or more integrators connected in series, the second conversion path comprises two or more integrators connected in series, and the main loop is configured to feed back a signal indicative of the average of the first digital bit stream and the second digital bit stream to a first integrator of the two or more integrators of the first conversion path and to a first integrator of the two or more integrators of the second conversion path.
14. The analogue-to-digital converter as claimed in claim 12 , wherein the first conversion path comprises two or more integrators connected in series, the second conversion path comprises two or more integrators connected in series, and wherein each of the one or more local loops is configured to feed back an output of one of the integrators to an input of that integrator.
15. The analogue-to-digital converter as claimed in claim 14 , wherein each of the one or more local loops is further configured to connect to an integrator in the first conversion path to a corresponding integrator in the second conversion path.
16. The analogue-to-digital converter as claimed in claim 1 , wherein the first conversion path comprises two or more integrators connected in series, the second conversion path comprises two or more integrators connected in series, and wherein a final integrator of the two or more integrators of the first conversion path is configured to receive different feedback from the other integrators of the two or more integrators of the first conversion path and a final integrator of the two or more integrators of the second conversion path is configured to receive different feedback from the other integrators of the two or more integrators of the second conversion path.
17. The analogue-to-digital converter as claimed in claim 16 , wherein the feedback received by the final integrator of the two or more integrators of the first conversion path differs from the feedback received by the other integrators of the two or more integrators of the first conversion path in delay, and wherein the feedback received by the final integrator of the two or more integrators of the second conversion path differs from the feedback received by the other integrators of the two or more integrators of the second conversion path in delay.
18. The analogue-to-digital converter as claimed in claim 1 , wherein the first conversion path includes a sigma-delta modulator and the second conversion path includes a sigma-delta modulator.
19. The analogue-to-digital converter as claimed in claim 1 , further comprising an input switch configured to alternately connect the analogue input signal to the first conversion path and to the second conversion path.
20. The analogue-to-digital converter as claimed in claim 19 , wherein the analogue input signal is a radio-frequency signal, wherein the input switch alternately connects the analogue input signal at a local oscillator frequency, and wherein the local oscillator frequency is chosen to mix the analogue input signal down to an intermediate frequency.