IP Library Granted Patent US 9,276,616
Granted Patent B2
US 9,276,616 · App. 14/151,943 · Granted Mar 1, 2016

Integrated circuit chip inductor configuration

Inventor: Michael John Story (Whittlesford, GB)
Assignee: Qualcomm Technologies International, Ltd.
H04B1/04H01F17/0006H01F27/346
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Quick Facts
Patent No.
US 9,276,616
App. No.
14/151,943
Granted
Mar 1, 2016
Kind
B2
Abstract

An integrated circuit chip including a first inductor; a second inductor having n 1 turns and located a distance r 1 from the first inductor; and a third inductor having n 2 turns and located a distance r 2 from the first inductor; wherein the second and third inductors are coupled so as to cause current to circulate around the second inductor in a first rotational direction and around the third inductor in a second rotational direction opposite to the first rotational direction; and wherein n 1 , n 2 , r 1 and r 2 are such that current induced in the first inductor due to magnetic coupling from the second inductor is negated by current induced in the first inductor due to magnetic coupling from the third inductor.

Claims (41)

1. An integrated circuit chip comprising:

a first inductor;

a second inductor having n 1 turns and located a distance r 1 from the first inductor; and

a third inductor having n 2 turns and located a distance r 2 from the first inductor;

wherein the second and third inductors are coupled so as to cause current to circulate around the second inductor in a first rotational direction and around the third inductor in a second rotational direction opposite to the first rotational direction; and

wherein n 1 , n 2 , r 1 and r 2 are such that current induced in the first inductor due to magnetic coupling from the second inductor is negated by current induced in the first inductor due to magnetic coupling from the third inductor;

transmitter circuitry having a transmit signal path, wherein the second inductor and the third inductor are located on the transmit signal path; and

a local oscillator configured to drive a frequency mixer on the transmit signal path, wherein the local oscillator comprises the first inductor,

wherein the first, second and third inductors are configured to operate at a same frequency.

2. The integrated circuit chip as claimed in claim 1 , wherein the second inductor and the third inductor are connected in series.

3. The integrated circuit chip as claimed in claim 1 , further comprising a local oscillator configured to drive a frequency mixer on the receive signal path, wherein the local oscillator comprises the third inductor.

4. The integrated circuit chip as claimed in claim 3 , wherein the local oscillator is further configured to drive a frequency mixer on the transmit signal path.

5. The integrated circuit chip as claimed in claim 3 , wherein the first inductor is located on the receive signal path.

6. The integrated circuit chip as claimed in claim 3 , wherein the second inductor is located on the receive signal path.

7. The integrated circuit chip as claimed in claim 6 , wherein the second inductor is also located on a transmit signal path.

8. The integrated circuit chip as claimed in claim 1 , wherein the second inductor comprises a first turn and one or more further turns, each of the one or more further turns circumscribing the first turn.

9. The integrated circuit chip as claimed in claim 1 , wherein the third inductor comprises a first turn and one or more further turns, each of the one or more further turns circumscribing the first turn.

10. The integrated circuit chip as claimed in claim 1 , wherein the second inductor has a spiral shape.

11. The integrated circuit chip as claimed in claim 1 , wherein the third inductor has a spiral shape.

12. The integrated circuit chip as claimed in claim 1 , wherein the first inductor has a spiral shape.

13. The integrated circuit chip as claimed in claim 1 , wherein the first inductor, the second inductor and the third inductor are formed by metallisation on a substrate.

14. The integrated circuit chip as claimed in claim 1 , wherein the first inductor, the second inductor and the third inductor are located on the same plane.

15. An integrated circuit chip comprising:

a first inductor;

a second inductor having n 1 turns and located a distance r 1 from the first inductor; and

a third inductor having n 2 turns and located a distance r 2 from the first inductor;

wherein the second and third inductors are coupled so as to cause current to circulate around the second inductor in a first rotational direction and around the third inductor in a second rotational direction opposite to the first rotational direction; and

wherein n 1 , n 2 , r 1 and r 2 are such that current induced in the first inductor due to magnetic coupling from the second inductor is negated by current induced in the first inductor due to magnetic coupling from the third inductor,

wherein

n

1

r

1

3

=

n

2

r

2

3

.

Assignments (2)
CHANGE OF NAME Recorded Sep 22, 2015
From: CAMBRIDGE SILICON RADIO LIMITED
To: QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.
Reel/Frame 036663/0211 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2014
From: STORY, MICHAEL JOHN
To: CAMBRIDGE SILICON RADIO LIMITED
Reel/Frame 031958/0789 →
Continuity (1)
Related Publication 20150200052A1 · Jul 16, 2015