IP Library Granted Patent US 8,822,243
Granted Patent B2
US 8,822,243 · App. 14/155,090 · Granted Sep 2, 2014

Light emitting devices having light coupling layers with recessed electrodes

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Quick Facts
Patent No.
US 8,822,243
App. No.
14/155,090
Granted
Sep 2, 2014
Kind
B2
Abstract

A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.

Claims (48)

1. A method for forming a light emitting device, comprising:

forming a buffer layer;

roughening a portion of the buffer layer to form a light coupling layer; and

forming an electrode on the light coupling layer,

wherein the light coupling layer is formed adjacent to one of an n-type semiconductor layer and a p-type semiconductor layer,

wherein said one of either the n-type semiconductor layer or the p-type semiconductor layer is formed adjacent to an active layer,

wherein said active layer is formed adjacent to the other of the n-type semiconductor layer and the p-type semiconductor layer,

wherein said the other of the n-type semiconductor layer and the p-type semiconductor layer is formed adjacent to a support substrate,

wherein the light coupling structure has a corrugated surface including a first corrugation portion and comprises an orifice extending to said one of either the n-type semiconductor layer or the p-type semiconductor layer, the orifice including a second corrugation portion different from the first corrugation portion, and

wherein the electrode is formed on the second corrugation portion in the orifice, the electrode in electrical communication with said one of either the n-type semiconductor layer or the p-type semiconductor layer.

2. The method of claim 1 , wherein the buffer layer comprises one or more Group III-V semiconductor materials.

3. The method of claim 2 , wherein the buffer layer comprises one or more of u-type gallium nitride, aluminum gallium nitride and aluminum nitride.

4. The method of claim 1 , wherein roughening the portion of the buffer layer comprises:

forming a layer of a metallic material over the buffer layer;

defining an opening in the layer of the metallic material, the opening extending to the buffer layer;

forming metallic particles from the layer of the metallic material; and

etching the buffer layer.

5. The method of claim 1 , further comprising providing, in a reaction chamber, a substrate comprising the buffer layer.

6. The method of claim 1 , wherein said one of an n-type semiconductor layer and a p-type semiconductor layer is a p-type semiconductor layer.

7. A method for forming a light emitting device, comprising:

forming a buffer layer;

forming an n-type Group III-V semiconductor layer on the buffer layer;

forming an active layer on the n-type Group III-V semiconductor layer;

forming a p-type Group III-V semiconductor layer on the active layer;

forming a light coupling structure on the n-type Group III-V semiconductor layer, the light coupling structure comprising a corrugated surface including a first corrugation portion and a second corrugation portion different from the first corrugation portion; and

forming an electrode on the second corrugation portion of the light coupling structure, the electrode in electrical communication with the n-type Group III-V semiconductor layer.

8. The method of claim 7 , further comprising:

forming the buffer layer on a first substrate; and

removing the first substrate after forming the p-type Group III-V semiconductor layer,

wherein the light coupling structure is formed on a first side of the buffer layer opposite to a second side of the buffer layer, the n-type Group III-V semiconductor layer formed on the second side of the buffer layer.

9. The method of claim 8 , further comprising:

forming a second substrate on the p-type Group III-V semiconductor layer.

10. The method of claim 9 , further comprising:

forming an optical reflector on the p-type Group III-V semiconductor layer prior to forming the second substrate.

11. The method of claim 7 , wherein the light coupling structure comprises one or more Group III-V semiconductor materials.

12. The method of claim 11 , wherein the one or more Group III-V semiconductor materials of the light coupling structure are selected from the group consisting of n-type gallium nitride, u-type gallium nitride, aluminum gallium nitride and aluminum nitride.

13. The method of claim 7 , further comprising:

forming an orifice in the light coupling structure prior to forming the electrode,

wherein the second corrugation portion is formed in the orifice.

14. The method of claim 13 , wherein the orifice has a circular, elliptical, triangular, square, rectangular, pentagonal, hexagonal, heptagonal or nonagonal cross-section.

15. The method of claim 13 , wherein the orifice is a channel extending along at least a portion of the light coupling structure.

16. The method of claim 7 , further comprising:

forming an orifice in the light coupling structure so as to expose a portion of the n-type Group III-V semiconductor layer prior to forming the electrode,

wherein the second corrugation portion is formed in the orifice.

17. The method of claim 7 , wherein the second corrugation portion has a plurality of corrugations less than or equal to about 300 nanometers (nm).

18. The method of claim 7 , wherein the light coupling structure comprises one or more light coupling moieties, an individual light coupling moiety having a decreasing width along an axis oriented away from the active layer.

19. The method of claim 7 , wherein the light coupling structure comprises at least two layers of different materials, at least one of the layers comprising a u-type semiconductor layer.

20. The method of claim 7 , wherein the second corrugation portion is smaller than the first corrugation portion.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2016
From: MANUTIUS IP, INC.
To: TOSHIBA CORPORATION
Reel/Frame 038334/0444 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2014
From: TOSHIBA TECHNO CENTER INC.
To: MANUTIUS IP INC.
Reel/Frame 033396/0383 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2014
From: LIN, CHAO-KUN; YAN, LI; CHUANG, CHIH-WEI
To: BRIDGELUX, INC.
Reel/Frame 031971/0884 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2014
From: BRIDGELUX, INC.
To: TOSHIBA TECHNO CENTER INC.
Reel/Frame 031971/0975 →