IP Library Granted Patent US 9,674,524
Granted Patent B2
US 9,674,524 · App. 14/156,115 · Granted Jun 6, 2017

Video decoder with signaling

Inventor: Sachin G. Deshpande (Camas, WA)
Assignee: Huawei Technologies Co., Ltd.
H04N19/00484H04N19/423H04N19/58H04N19/436H04N19/513
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Quick Facts
Patent No.
US 9,674,524
App. No.
14/156,115
Granted
Jun 6, 2017
Kind
B2
Abstract

A system for decoding a video bitstream.

Claims (23)

1. A decoder for decoding a current picture of a video stream, the decoder configured to:

receive a reference picture set identifying previously decoded pictures that are indicated as reference pictures in a decoded picture buffer containing said previously decoded pictures, wherein said previously decoded pictures were decoded by the decoder, wherein said previously decoded pictures are used for subsequent decoding,

and wherein said reference pictures in said reference picture set are identified by picture order count values represented by at least one bit including a least significant bit;

receive said current picture together with said reference picture set for said current picture; and

receive a delta picture order count most significant bit presence flag indicating whether a delta picture order count most significant bit cycle is present or not present, wherein said delta picture order count most significant bit cycle being present indicates that more than one reference picture in said decoded picture buffer have same value for the least significant bit of said picture order count,

wherein an identified previous picture is one of said previously decoded pictures having a temporal ID being equal to zero, wherein said identified previous picture is not a RASL picture, wherein said identified previous picture is not a RADL picture, wherein said identified previous picture is not a sub-layer non-reference picture.

2. The decoder of claim 1 wherein said delta picture order count most significant bit present flag equal to 1 specifies that said delta picture order count most significant bit cycle is present.

3. The decoder of claim 2 wherein said delta picture order count most significant bit present flag equal to 0 specifics that said delta picture order count most significant bit cycle is not present.

4. The decoder of claim 3 wherein an identified previous picture is one of said previously decoded pictures having a temporal ID equal to zero.

5. The decoder of claim 3 wherein said delta picture order count most significant bit present flag is delta_poc_msb_present_flag[i] and said delta picture order count most significant bit cycle is delta_poc_msb_cycle_lt[i].

6. A decoder for decoding a current picture of a video stream, said decoder configured to:

use previously decoded pictures decoded by said decoder as reference pictures for subsequent decoding;

receive a reference picture set identifying previously decoded pictures that are indicated as reference pictures in a decoded picture buffer containing said previously decoded pictures, said reference picture set indicating said reference pictures by picture order count values;

receive said current picture together with said reference picture set for said current picture;

receive a delta picture order count most significant bit presence flag indicating whether a delta picture order count most significant bit cycle is present or not present, wherein said delta picture order count most significant bit cycle being present indicates that more than one reference picture in said decoded picture buffer having same value for a least significant bit of a representation of said picture order count,

wherein said delta picture order count most significant bit present flag equal to 1 specifies that said delta picture order count most significant bit cycle is present,

wherein said delta picture order count most significant bit present flag equal to 0 specifics that said delta picture order count most significant bit cycle is not present, and

wherein said identified previous picture having a temporal ID equal to zero is not a RASL picture.

7. The decoder of claim 6 wherein said identified previous picture having said temporal ID equal to zero is not a RADL picture.

8. The decoder of claim 7 wherein said identified previous picture having said temporal ID equal to zero is not a sub-layer non-reference picture.

9. The decoder of claim 6 wherein said delta picture order count most significant bit presence flag is equal to 1 when a modulo of each picture order count value of more than one of said reference pictures in said decoded picture buffer equals to a defined value, wherein the modulo is based on a modulus corresponding to a maximum number of least significant bits.

10. The decoder of claim 9 wherein said defined value is based on said least significant bit of said picture order count of the said current picture.

11. The decoder of claim 10 wherein said defined value is equal to PocLsbLt[i].

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2016
From: SHARP LABORATORIES OF AMERICA, INC.
To: SHARP KABUSHIKI KAISHA
Reel/Frame 037526/0073 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2015
From: SHARP KABUSHIKI KAISHA
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 037278/0445 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2014
From: DESHPANDE, SACHIN G.
To: SHARP LABORATORIES OF AMERICA, INC.
Reel/Frame 033048/0765 →
Continuity (2)
Provisional Application 61752937 · Jan 15, 2013
Related Publication 20140198857A1 · Jul 17, 2014