IP Library Granted Patent US 9,195,407
Granted Patent B2
US 9,195,407 · App. 14/157,945 · Granted Nov 24, 2015

Apparatus, method and system for using shadow drives for alternative drive commands

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Quick Facts
Patent No.
US 9,195,407
App. No.
14/157,945
Granted
Nov 24, 2015
Kind
B2
Abstract

A storage processor is configured to identify a first disk drive and a second shadow drive associated with the first disk drive to an initiator. The storage processor receives storage commands from an initiator. When the storage commands access the first disk drive, the storage processor issues a first storage operation to the first disk drive. When the storage commands access the second shadow drive, the storage processor issues different storage operations to the first disk drive that are not supported by the initiator.

Claims (33)

1. An apparatus, comprising:

a processor;

storage media communicating with a processor;

the processor configured to receive a storage command; and, in response to the received storage command:

perform a first storage operation on the storage media when the received storage command is associated with the storage media; or

perform a second storage operation on the storage media when the received storage command is associated with a virtual storage media corresponding to the storage media;

determine a utilization of blocks of memory of a cache of data in memory devices of the storage media; and

invalidate data of selected blocks of the cache of data based on a utilization criteria.

2. The apparatus of claim 1 , wherein the virtual storage media is mapped to the storage media.

3. The apparatus of claim 1 , wherein the storage media comprises a plurality of memory devices.

4. The apparatus of claim 3 , wherein the second storage operation is to read data from a first memory device of the storage media and store the data on a second memory device of the storage media.

5. The apparatus of claim 4 , wherein the second memory device is a cache memory.

6. The apparatus of claim 1 , wherein the memory devices are semiconductor devices.

7. The apparatus of claim 6 , wherein the semiconductor devices are FLASH memory.

8. The apparatus of claim 1 , wherein the second storage operation is a plurality of storage operations.

9. The apparatus of claim 8 , wherein the second storage operation comprises writing data to a selectable group of the memory devices.

10. The apparatus of claim 9 , wherein the group of the memory devices is selected based on an amount of data associated with the second storage operation.

11. The apparatus of claim 10 , wherein the group is a stripe.

12. The apparatus of claim 1 , wherein the utilization is determined on a periodic basis.

13. The apparatus of claim 1 , wherein the second storage operation is a request for a performance metric of the storage media.

14. A method, comprising:

mapping memory devices of a plurality of memory devices to virtual memory devices of a plurality of virtual memory devices;

providing a processor in communication with the plurality of memory devices and configured to receive a storage command;

receiving the storage command from an initiator; and

if the storage command is associated with a memory device of the plurality of memory devices,

initiating a first storage operation on the memory device; or

if the storage command is associated with a virtual memory device:

initiating a second storage operation on the memory device mapped to the virtual memory device,

wherein the second storage operation includes reading data from the mapped memory device of the plurality of memory devices and storing data read from the mapped memory device in another memory device of the plurality of memory devices;

designating at least one memory memory device of the plurality of memory devices as a cache device for storing data,

determining a utilization of blocks of memory of the cache device; and

invalidating stored data of selected blocks of memory of the cache device based on a utilization criteria.

15. The method of claim 14 , wherein the second storage operation is a request for a performance metric of the memory device.

Assignments (5)
CORRECTIVE ASSIGNMENT TO REMOVE US PATENT NO. 9013874 PREVIOUSLY RECORDED UNDER REEL AND FRAME 064272/0249. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 17, 2024
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 068998/0780 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2023
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 064272/0249 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2021
From: SILICON VALLEY BANK
To: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC (F/K/A VIOLIN MEMORY, INC.))
Reel/Frame 056600/0186 →
RELEASE OF SECURITY INTEREST Recorded Feb 27, 2018
From: SILICON VALLEY BANK
To: VIOLIN SYSTEMS LLC
Reel/Frame 045045/0116 →
CHANGE OF NAME Recorded Dec 19, 2017
From: VIOLIN MEMORY, INC.
To: VIOLIN SYSTEMS LLC
Reel/Frame 044908/0680 →