IP Library Granted Patent US 9,612,119
Granted Patent B2
US 9,612,119 · App. 14/158,765 · Granted Apr 4, 2017

Integrated inertial sensing device

Inventors: Sanjay Bhandari (San Jose, CA); Ali J. Rastegar (San Jose, CA); Sudheer S. Sridharamurthy (San Jose, CA)
Assignee: mCube Inc.
G01C19/5776
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Quick Facts
Patent No.
US 9,612,119
App. No.
14/158,765
Granted
Apr 4, 2017
Kind
B2
Abstract

A system can include a MEMS gyroscope having a MEMS resonator overlying a CMOS IC substrate. The CMOS IC substrate can include an AGC loop circuit coupled to the MEMS gyroscope. The AGC loop acts in a way such that generated desired signal amplitude out of the drive signal maintains MEMS resonator velocity at a desired frequency and amplitude. A benefit of the AGC loop is that the charge pump of the HV driver inherently includes a ‘time constant’ for charging up of its output voltage. The system incorporates the Low pass functionality in to the AGC loop without requiring additional circuitry.

Claims (39)

1. A system comprising an integrated MEMS gyroscope architecture, the system comprising:

a substrate member having a surface region;

a CMOS IC layer overlying the surface region, the CMOS IC layer having a CMOS surface region, the CMOS IC layer having:

a drive loop, the drive loop including a first Charge Sense Amplifier (CSA_DRV), a first phase shifter (PS 0 ), a first comparator, and an high-voltage (HV) driver;

an Automatic Gain Control (AGC) loop circuit, the AGC loop circuit including, the first comparator, a rectifier, a proportional-integral-derivative (PID) controller, the high-voltage (HV) driver, and a charge pump coupled in series in a loop, wherein an input of the first comparator is coupled to the rectifier and an output of the first comparator is coupled to the HV driver; and

a sense path having a second Charge Sense Amplifier (CSA_SNS), a first Programmable Gain Amplifier (PGA 1 ), a mixer, a second Programmable Gain Amplifier (PGA 2 ), a Low Pass Filter (LPF), an A/D converter (ADC), and digital processing circuits;

a MEMS gyroscope overlying the CMOS surface region, the MEMS gyroscope electrically coupled to the drive loop and the sense path, the MEMS gyroscope electrically coupled to the AGC loop circuit through the drive loop; and

metal shielding within a vicinity of the MEMS gyroscope configured to reduce parasitic effects.

2. The system of claim 1 further comprising a mixer coupled to the MEMS gyroscope, wherein the mixer is configured as a transmission gate.

3. The system of claim 2 further comprising a circuit loop consisting of a digital low-pass-filter (LPF) coupled to a digital/analog converter (DAC), the circuit loop being coupled to the mixer.

4. The system of claim 1 further comprising a programmable phase-shifter coupled to the comparator to adjust a phase difference optimally to compensate for analog phase shifts.

5. The system of claim 1 wherein the charge pump is a first charge pump, and the system further comprises a second charge pump, wherein the first and second charge pumps are configured to enable operation of the system at greater voltages.

6. A system comprising an integrated MEMS gyroscope architecture, the system comprising:

a substrate member having a surface region;

a CMOS IC layer overlying the surface region, the CMOS IC layer having a CMOS surface region, the CMOS IC layer having:

an Automatic Gain Control (AGC) loop circuit, the AGC loop circuit including a rectifier, a comparator, a proportional-integral-derivative (PID) controller, a charge pump, a high-voltage (HV) driver, a drive charge-sense-amplifier (CSA), and a 90 degrees phase shifter, wherein an output of the CSA is coupled to the 90 degree phase shifter, an output of the 90 degree phase shifter is coupled to an input of the comparator and is also coupled to the rectifier, an output of the comparator is coupled to the HV driver, the PID controller receives an output from the rectifier and a reference signal and generates an output in proportion to the difference of its input signals, and provide an output to control the gain of the HV driver; and

a sense path having Charge Sense Amplifier (CSA_SNS), a Programmable Gain Amplifier (PGA 1 ), a mixer, another Programmable Gain Amplifier (PGA 2 ), a Low Pass Filter (LPF), an A/D converter (ADC), and digital processing circuits; and

a MEMS gyroscope overlying the CMOS surface region, the MEMS gyroscope electrically coupled to the AGC loop circuit; and

metal shielding within a vicinity of the MEMS gyroscope configured to reduce parasitic effects.

7. The system of claim 6 further comprising a mixer coupled to the MEMS gyroscope, wherein the mixer is configured as a transmission gate.

8. The system of claim 7 further comprising a circuit loop including a digital low-pass-filter (LPF) coupled to a digital/analog converter (DAC), the circuit loop being coupled to the mixer or PGA 2 to effectively cancel dc offset or low frequency undesired artifacts.

9. The system of claim 6 further comprising a programmable phase-shifter (PS) coupled to the comparator.

10. The system of claim 6 further comprising a programmable high-pass filter (HPF) having a cut off frequency implemented using a DAC and a digital LPF in feedback configuration.

11. The system of claim 6 wherein the comparator is a first comparator, and further comprising a quadrature mode circuit including a second comparator and a multiplexer, wherein the quadrature mode circuit is configured to monitor a quadrature signal from the MEMS gyroscope.

12. The system of claim 6 further comprising a digital delay module coupled to the comparator and the HV driver, the digital delay module being configured to lock into a desired frequency.

13. The system of claim 6 further comprising metal shielding within a vicinity of the MEMS gyroscope, the metal shielding being configured to reduce parasitic effects.

14. A system comprising an integrated MEMS gyroscope architecture, the system comprising:

a substrate member having a surface region;

a CMOS IC layer overlying the surface region, the CMOS IC layer having a CMOS surface region, the CMOS IC layer having:

an Automatic Gain Control (AGC) loop circuit, the AGC loop circuit including a rectifier, a comparator, a proportional-integral-derivative (PID) controller, a high-voltage (HV) driver, a drive charge-sense-amplifier (CSA_DRV), and a 90 degrees phase shifter, and a charge pump, wherein an output of the CSA_DRV is coupled to the 90 degree phase shifter, an output of the 90 degree phase shifter is coupled to an input of the comparator and is also coupled to the rectifier, an output of the comparator is coupled to the HV driver, the PID controller receives an output from the rectifier and a reference signal and generates an output in proportion to the difference of its input signals, and provide an output to control the gain of the HV driver;

a sense path having a sense Charge Sense Amplifier (CSA_SNS), a Programmable Gain Amplifier (PGA 1 ), a mixer, another Programmable Gain Amplifier (PGA 2 ), a Low Pass Filter (LPF), an A/D converter (ADC), and digital processing circuits; and

a MEMS gyroscope overlying the CMOS surface region and electrically coupled to the AGC loop circuit, the MEMS gyroscope including drive feedback capacitors and sense capacitors, wherein the drive feedback capacitors are coupled to the drive CSA (CSA_DRV) and the sense capacitors are coupled to the sense CSA (CSA_SNS); and

metal shielding within a vicinity of the MEMS gyroscope configured to reduce parasitic effects.

15. The system of claim 14 further comprising a supply regulator coupled in series to a charge pump and to the MEMS gyroscope.

16. The system of claim 14 wherein the CSA is a drive CSA, and further comprising a mixer coupled in series to a sense CSA and to the MEMS gyroscope, wherein the mixer is configured as a transmission gate and the sense capacitors are coupled to the sense CSA.

17. The system of claim 14 wherein the comparator is a first comparator, and further comprising a quadrature mode circuit including a second comparator and a multiplexer, wherein the quadrature mode circuit is configured to monitor a quadrature signal from the MEMS gyroscope.

18. The system of claim 14 further comprising a digital delay module coupled to the comparator and the HV driver, the digital delay module being configured to lock into a desired frequency.

19. The system of claim 14 wherein the HV driver is implemented as a simple digital gate, wherein the charge pump provides a power supply to the HV driver, providing automatic gain controlled ac pulses to the MEMS gyroscope.

20. The system of claim 14 wherein the HV driver consists of a conventional external supply (VDD) at a desired voltage.

Assignments (5)
PARTIAL TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 61948/0764 Recorded May 2, 2025
From: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS AGENT
To: MOVELLA INC.
Reel/Frame 071161/0930 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Nov 15, 2022
From: MOVELLA INC.
To: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS AGENT
Reel/Frame 061948/0764 →
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2022
From: SILICON VALLEY BANK
To: MOVELLA INC. (FORMERLY KNOWN AS MCUBE, INC.)
Reel/Frame 061763/0864 →
SECURITY INTEREST Recorded Mar 2, 2022
From: MOVELLA INC. (FKA MCUBE, INC.)
To: SILICON VALLEY BANK
Reel/Frame 059147/0471 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2014
From: RASTEGAR, ALI J.; BHANDARI, SANJAY; SRIDHARAMURTHY, SUDHEER
To: MCUBE INC.
Reel/Frame 032280/0353 →
Continuity (3)
Provisional Application 61755450 · Jan 22, 2013
Provisional Application 61755451 · Jan 22, 2013
Related Publication 20150276406A1 · Oct 1, 2015