Method for fabricating pixelated silicon device cells
A method, apparatus and system for flexible, ultra-thin, and high efficiency pixelated silicon or other semiconductor photovoltaic solar cell array fabrication is disclosed. A structure and method of creation for a pixelated silicon or other semiconductor photovoltaic solar cell array with interconnects is described using a manufacturing method that is simplified compared to previous versions of pixelated silicon photovoltaic cells that require more microfabrication steps.
1. A method comprising:
(a) depositing a dielectric layer on a polished first side of a device layer;
(b) forming openings in the dielectric layer;
(c) doping the device layer through the openings in the dielectric layer;
(d) metallizing the device layer through the openings in the dielectric layer;
(e) a process that results in the device layer being broken into or singulated into device cells separate from each other with a gap in between the device cells and subsequently the device cells being attached to a polymer layer;
(f) damaging the polymer layer to expose metal contacts; and
(g) forming conductive elements onto the exposed metal contacts through the openings in the polymer layer so that the metal contacts are interconnected.
2. The method of claim 1 , wherein the process to break or singulate the device layer into device cells separate from each other with a gap in between the device cells and the device cells being attached to a polymer layer is comprised by:
(a) attaching a tape or film onto a second side of the device;
(b) spreading the tape or film to break the device layer into device cells so that there exists a gap between the device cells; and
(c) transferring the device cells onto a polymer layer.
3. The method of claim 2 , wherein prior to spreading the tape or film, the method comprises damaging the device layer.
4. The method of claim 3 , wherein prior to transferring the device cells onto a polymer layer, the method comprises contracting the tape or film to reduce the gap between the device cells.
5. The method of claim 4 , wherein after transferring the device cells onto a polymer layer, the method comprises removing the tape or film.
6. The method of claim 5 , wherein the dielectric layer is a first dielectric layer, the method further comprises depositing a second dielectric layer on the device cells.
7. The method of claim 6 , wherein damaging the device layer comprises: stealth dicing, die saw, or laser ablation.
8. The method of claim 7 , wherein the polymer layer comprises a polymer selected from a group of polyimide, polyester, polyurethane, polychlorotrifluoroethylene, Kapton, Tedlar, DURApro, polyvinyl fluoride, polyvinyl chloride, polytetrafluoroethylene, polyvinylidene fluoride, and polydimethylsiloxane.
9. The method of claim 2 , wherein the polymer layer comprises one or more conductive elements implanted onto the polymer layer.
10. A method comprising:
depositing a dielectric layer on a polished first side of a device layer;
forming openings in the dielectric layer;
doping the device layer through the openings in the dielectric layer;
metallizing the device layer through the openings in the dielectric layer;
attaching a polymer layer to the first side of the device layer;
lithographically defining an etch mask onto the second side of the device layer; and
etching the device layer into separate device cells such that a gap exists between the device cells;
damaging the polymer layer to expose metal contacts; and
forming conductive elements onto the exposed metal contacts through the openings in the polymer layer so that the metal contacts are interconnected.
11. The method of claim 10 , wherein the dielectric layer is a first dielectric layer, the method further comprising depositing a second dielectric layer on the device cells.
12. The method of claim 10 , wherein the polymer layer comprises a polymer selected from a group of polyimide, polyester, polyurethane, polychlorotrifluoroethylene, Kapton, Tedlar, DURApro, polyvinyl fluoride, polyvinyl chloride, polytetrafluoroethylene, polyvinylidene fluoride, and polydimethylsiloxane.
13. The method of claim 10 , wherein the polymer layer comprises one or more conductive elements implanted onto the polymer layer.