IP Library Granted Patent US 9,235,196
Granted Patent B2
US 9,235,196 · App. 14/161,235 · Granted Jan 12, 2016

Constant voltage circuit and analog electronic clock

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Quick Facts
Patent No.
US 9,235,196
App. No.
14/161,235
Granted
Jan 12, 2016
Kind
B2
Abstract

There are provided a constant voltage circuit that features low current consumption and stable operation, and an analog electronic clock provided with the constant voltage circuit. The constant voltage circuit includes a differential amplifier circuit which is turned on/off by a predetermined signal and which controls the voltage of a gate of an output transistor on the basis of a reference voltage and a feedback voltage that are received, a switch circuit which is connected to an output terminal of the differential amplifier circuit and which is turned on/off by a predetermined signal, and a voltage holding circuit which is connected between the gate of the output transistor and a power supply terminal and which has a resistor and a capacitor connected in series. An analog electronic clock provided with the foregoing constant voltage circuit that supplies a voltage to at least an oscillation circuit and a frequency division circuit.

Claims (12)

1. A constant voltage circuit comprising:

an output transistor connected between an output terminal and a power supply terminal;

a voltage dividing circuit, which is connected between the output terminal and a grounding terminal and which divides an output voltage of the output terminal and outputs a feedback voltage;

a reference voltage circuit which outputs a reference voltage;

a differential amplifier circuit, which is turned on/off by a predetermined signal and which controls the voltage of a gate of the output transistor on the basis of the reference voltage and the feedback voltage that are received;

a switch circuit, which is connected to an output terminal of the differential amplifier circuit and which is turned on/off by the predetermined signal; and

a voltage holding circuit, which is connected between the gate of the output transistor and the power supply terminal and which has a resistor and a capacitor connected in series, wherein when the switch circuit is switched on, the voltage holding circuit is configured to hold a variable voltage output from the differential amplifier circuit to thereby control a voltage of the gate of the output transistor.

2. An analog electronic clock comprising:

an oscillation circuit which outputs a clock signal of a fixed frequency;

a frequency division circuit which divides the frequency of a clock signal output from the oscillation circuit and outputs a signal of a required frequency;

an output circuit which drives a motor according to a signal output from the frequency division circuit; and

the constant voltage circuit according to claim 1 , which supplies a voltage to at least the oscillation circuit and the frequency division circuit.

Assignments (4)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 037783 FRAME: 0166. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 23, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 037903/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION .
Reel/Frame 037783/0166 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2014
From: WATANABE, KOTARO; MITANI, MAKOTO
To: SEIKO INSTRUMENTS INC.
Reel/Frame 032030/0646 →