Capacitive pressure sensors and fabrication methods thereof

1. A method for fabricating a capacitive pressure sensor, comprising:

providing a substrate;

forming a trench in a surface of the substrate;

forming a first electrode including a first sub-electrode and a second sub-electrode on a side surface of the trench;

forming a first sacrificial layer on the first electrode;

etching the substrate under the bottom of the trench to form an etching hole in the substrate under the bottom of the trench;

forming a second electrode on a side surface and a bottom surface of the trench, a portion of the bottom of the trench, and a side surface of the first sacrificial layer;

forming a second sacrificial layer on the second electrode and filling up the trench and the etching hole;

forming a first sealing layer on the second sacrificial layer;

removing the first sacrificial layer to form a first chamber between the first electrode and the second electrode;

planarizing the substrate or etching the substrate to expose the sacrificial layer on the bottom surface of the etching hole;

removing the second sacrificial layer in the trench and the etching hole to form a second chamber in the second electrode; and

forming a second sealing layer on the other surface of the substrate to seal the second chamber.

2. The method according to claim 1 , wherein forming the first electrode further includes:

forming a first electrode material layer on the side surface and the bottom of the trench and the surface of the substrate;

removing the first electrode material layer on the bottom of the trench and the surface of the substrate to form a loop shape first electrode; and

removing a portion of the loop shape first electrode to break the loop shape first electrode into the first sub-electrode and the second sub-electrode.

3. The method according to claim 1 , wherein forming the first sealing layer and the second electrode further includes:

forming a second electrode material layer on a side surface and a bottom surface of the etching hole, a portion of the bottom of the trench, a side surface and a bottom surface of the first sacrificial layer, a top surface of the first electrode and a surface of the substrate;

forming a second sacrificial layer on the second electrode material layer and filling up the trench and the etching hole;

forming a first sealing material layer on the second sacrificial layer and the second electrode material layer; and

planarizing the first sealing material layer and the second electrode layer until the surface of the substrate is exposed.

4. The method according to claim 1 , after forming the second sealing layer, further including:

forming control circuits and interconnection structures in other regions of the substrate or a second substrate; and

connecting the first sub-electrode and the second sub-electrode with the control circuits through the interconnection structures.

5. The method according to claim 1 , wherein:

the first electrode is formed by a sputtering process.

6. The method according to claim 1 , wherein:

the first sub-electrode and the second sub-electrode are formed by removing portions of the first electrode to break the first electrode into two parts; and

an area of the first sub-electrode is equal to an area of the second sub-electrode.

7. The method according to claim 1 , wherein:

a surface of the second sacrificial layer is lower than the surface of the substrate; and

a surface of the first sealing layer on the second sacrificial layer levels with the surface of the substrate.

8. The method according to claim 1 , wherein:

the second sealing layer is formed by a chemical vapor deposition process.

9. The method according to claim 1 , wherein:

the first sacrificial layer is removed an ammonia-contained plasma process; and

the second sacrificial layer is removed by a plasma ashing process.

10. The method according to claim 1 , wherein:

the first electrode is a loop shape; and

the second electrode is a loop shape.