Dual compartment semiconductor package
View Patent ↗According to an exemplary embodiment, a dual compartment semiconductor package includes a conductive clip having first and second compartments. The first compartment is electrically and mechanically connected to a top surface of the first die. The second compartment electrically and mechanically connected to a top surface of a second die. The dual compartment semiconductor package also includes a groove formed between the first and second compartments, the groove preventing contact between the first and second dies. The dual compartment package electrically connects the top surface of the first die to the top surface of the second die. The first die can include an insulated-gate bipolar transistor (IGBT) and the second die can include a diode. A temperature sensor can be situated adjacent to, over, or within the groove for measuring a temperature of the dual compartment semiconductor package.
1. A semiconductor package comprising:
a conductive clip having first and second compartments;
said first compartment electrically connected to a first die;
said second compartment electrically connected to a second die;
a groove formed between said first and second compartments and including a contact portion;
said conductive clip electrically connecting said first to said second die.
2. The semiconductor package of claim 1 , wherein said second die comprises a diode.
3. The semiconductor package of claim 1 , wherein said first die comprises an insulated-gate bipolar transistor (IGBT).
4. The semiconductor package of claim 3 , wherein a collector electrode of said IGBT is situated over said first die and a gate electrode and an emitter electrode of said IGBT are situated under said first die.
5. The semiconductor package of claim 1 , wherein said first die comprises an IGBT and said second die comprises a diode.
6. The semiconductor package of claim 5 , wherein a collector of said IGBT is connected to said first compartment, and a cathode of said diode is connected to said second compartment.
7. The semiconductor package of claim 1 , wherein said contact portion is configured to connect to a substrate.
8. The semiconductor package of claim 1 , comprising a heat sink over said groove.
9. The semiconductor package of claim 1 , comprising a heat sink thermally connected to said first compartment.
10. The semiconductor package of claim 1 , comprising a heat sink thermally connected to said second compartment.
11. The semiconductor package of claim 1 , comprising a heat sink thermally connected to said first and second compartments.
12. The semiconductor package of claim 1 , wherein a top surface of said first compartment is coplanar with a top surface of said second compartment.
13. A semiconductor package comprising:
a conductive clip having first and second compartments;
said first compartment electrically connected to a first die, said first die comprises an insulated-gate bipolar transistor (IGBT), wherein a collector electrode of said IGBT is situated over said first die and a gate electrode and an emitter electrode of said IGBT are situated under said first die;
said second compartment electrically connected to a second die;
a groove formed between said first and second compartments and including a contact portion;
said package electrically connecting said first to said second die.
14. A semiconductor package comprising:
a conductive clip having first and second compartments;
said first compartment electrically connected to a first die, said first die comprising an insulated-gate bipolar transistor (IGBT), wherein a collector of said IGBT is connected to said first compartment;
said second compartment electrically connected to a second die, said second die comprising a diode, wherein a cathode of said diode is connected to said second compartment;
a groove formed between said first and second compartments and including a contact portion;
said package electrically connecting said first to said second die.