IP Library Patent Application 14163994
Patent Application
App. No. 14/163,994

SAW-LESS RECEIVER WITH RF FREQUENCY TRANSLATED BPF

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Quick Facts
Patent No.
US None
App. No.
14/163,994
Abstract

A SAW-less receiver includes an interface, an RF to IF receiver section, and a receiver IF to baseband section. The RF to IF receiver section includes a frequency translated bandpass filter (FTBPF), a Low Noise Amplifier (LNA), and a mixing section. The FTBPF includes a switching network and a plurality of baseband impedances. The switching network is operable to couple the plurality of baseband impedances to the interface in accordance with a plurality of phase-offset RF clock signals to RF bandpass filter the inbound RF signal. The LNA amplifies the filtered inbound RF signal and the mixing section mixes the amplified inbound RF signal with a local oscillation to produce an inbound IF signal. The receiver IF to baseband section converts the inbound IF signal into one or more inbound symbol streams. Filtering may be prior or after amplification by the LNA.

Claims (86)

1 . An integrated circuit comprising:

an interface configured to receive an inbound radio frequency (RF) signal;

a low noise amplifier (LNA) configured to amplify the inbound RF signal;

a frequency translated bandpass filter (FTBPF) configured to RF bandpass filter the inbound RF signal to produce a filtered inbound RF signal, the FTBPF having:

a plurality of baseband impedances configured to form a baseband filter response; and

a switching network configured to frequency translate the baseband filter response to an RF filter response based upon a plurality of phase-offset RF clock signals; and

conversion circuitry configured to mix the filtered inbound RF signal with a local oscillation to produce an inbound IF signal.

2 . The integrated circuit of claim 1 , further comprising second conversion circuitry configured to convert the inbound IF signal into one or more inbound symbol streams.

3 . The integrated circuit of claim 2 , wherein the second conversion circuitry comprises:

a mixing section configured to mix the inbound IF signal with a second local oscillation to produce I and Q mixed signals; and

a combining & filtering section configured to:

combine the I and Q mixed signals to produce a combined signal; and

filter the combined signal to produce the one or more inbound symbol streams.

4 . The integrated circuit of claim 3 , wherein the mixing section comprises:

a mixing module configured to:

convert the amplified inbound RF signal into an in-phase (I) signal component and a quadrature (Q) signal component;

mix the I signal component with an I signal component of a local oscillation to produce an I mixed signal; and

mix the Q signal component with a Q signal component of the local oscillation to produce a Q mixed signal; and

a filter configured to filter the I and Q mixed signals to produce the inbound IF signal.

5 . The integrated circuit of claim 1 , wherein the interface comprises:

a transformer; and

a tunable capacitor network coupled to a secondary of the transformer and configured to filter the inbound RF signal.

6 . The integrated circuit of claim 1 , further comprising a clock generator configured to generate the plurality of phase-offset clock signals, the switching network configured to periodically couple the plurality of baseband impedances to an output of the LNA based on the plurality of phase-offset clock signals, and wherein a rate of the plurality of phase-offset clock signals corresponds to a frequency of the inbound RF signal.

7 . The integrated circuit of claim 1 , wherein the switching network is further configured to:

couple first and third baseband impedances of the plurality of baseband impedances in a first coupling pattern to filter the inbound RF signal during a first one of the plurality of phase-offset RF clock signals;

couple second and fourth baseband impedances of the plurality of baseband impedances in a second coupling pattern to filter the inbound RF signal during a second one of the plurality of phase-offset RF clock signals;

couple the first and third baseband impedances in an inverse first coupling pattern to filter the inbound RF signal during a third one of the plurality of phase-offset RF clock signals; and

couple the second and fourth baseband impedances in an inverse second coupling pattern to filter the inbound RF signal during a fourth one of the plurality of phase-offset RF clock signals.

8 . The integrated circuit of claim 1 , wherein a baseband impedance of the plurality of baseband impedances comprises at least one of:

a capacitor;

a variable capacitor;

a switched capacitor filter;

a switch capacitor resistance; and

a complex impedance.

9 . The integrated circuit of claim 1 , wherein the FTBPF further comprises a control module configured to receive a control signal that provides control information to adjust one or more of:

a quality factor of the baseband filter response;

a gain of the baseband filter response;

a bandwidth of the baseband filter response; and

an attenuation slope of the baseband filter response.

10 . An integrated circuit comprising:

an interface configured to receive an inbound radio frequency (RF) signal;

a frequency translated bandpass filter (FTBPF) configured to RF bandpass filter the inbound RF signal to produce a filtered inbound RF signal, the FTBPF having:

a plurality of baseband impedances configured to form a baseband filter response; and

a switching network configured to frequency translate the baseband filter response to an RF filter response based upon a plurality of phase-offset RF clock signals and;

a low noise amplifier (LNA) configured to amplify the filtered inbound RF signal; and

a conversion circuitry configured to mix the filtered inbound RF signal with a local oscillation to produce an inbound IF signal.

11 . The integrated circuit of claim 10 , further comprising second conversion circuitry configured to convert the inbound IF signal into one or more inbound symbol streams.

12 . The integrated circuit of claim 11 , wherein the second conversion circuitry comprises:

a mixing section configured to mix the inbound IF signal with a second local oscillation to produce I and Q mixed signals; and

a combining & filtering section configured to:

combine the I and Q mixed signals to produce a combined signal; and

filter the combined signal to produce the one or more inbound symbol streams.

13 . The integrated circuit of claim 12 , wherein the mixing section comprises:

a mixing module configured to:

convert the amplified inbound RF signal into an in-phase (I) signal component and a quadrature (Q) signal component;

mix the I signal component with an I signal component of a local oscillation to produce an I mixed signal; and

mix the Q signal component with a Q signal component of the local oscillation to produce a Q mixed signal; and

a filter configured to filter the I and Q mixed signals to produce the inbound IF signal.

14 . The integrated circuit of claim 10 , wherein the interface comprises:

a transformer; and

a tunable capacitor network coupled to a secondary of the transformer and configured to filter the inbound RF signal.

15 . The integrated circuit of claim 10 , further comprising a clock generator configured to generate the plurality of phase-offset clock signals, the switching network configured to periodically couple the plurality of baseband impedances to an input of the LNA based on the plurality of phase-offset clock signals, and wherein a rate of the plurality of phase-offset clock signals corresponds to a frequency of the inbound RF signal.

16 . The integrated circuit of claim 10 , wherein the switching network is further configured to:

couple first and third baseband impedances of the plurality of baseband impedances in a first coupling pattern to filter the inbound RF signal during a first one of the plurality of phase-offset RF clock signals;

couple second and fourth baseband impedances of the plurality of baseband impedances in a second coupling pattern to filter the inbound RF signal during a second one of the plurality of phase-offset RF clock signals;

couple the first and third baseband impedances in an inverse first coupling pattern to filter the inbound RF signal during a third one of the plurality of phase-offset RF clock signals; and

couple the second and fourth baseband impedances in an inverse second coupling pattern to filter the inbound RF signal during a fourth one of the plurality of phase-offset RF clock signals.

17 . The integrated circuit of claim 10 , wherein a baseband impedance of the plurality of baseband impedances comprises at least one of:

a capacitor;

a variable capacitor;

a switched capacitor filter;

a switch capacitor resistance; and

a complex impedance.

18 . The integrated circuit of claim 10 , wherein the FTBPF further comprises a control module configured to receive a control signal that provides control information to adjust one or more of:

a quality factor of the baseband filter response;

a gain of the baseband filter response;

a bandwidth of the baseband filter response; and

an attenuation slope of the baseband filter response.

19 . A method comprising:

receiving an inbound radio frequency (RF) signal;

amplifying the inbound RF signal;

forming a baseband filter response using a plurality of baseband impedances;

frequency translating the baseband filter response to an RF filter response using a switching network based upon a plurality of phase-offset RF clock signals;

filtering the inbound RF signal using the RF filter response to produce a filtered inbound RF signal; and

mixing the filtered inbound RF signal with a local oscillation to produce an inbound IF signal.

20 . The method of claim 19 , further comprising convert the inbound IF signal into one or more inbound symbol streams.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2014
From: MIRZAEI, AHMAD; DARABI, HOOMAN
To: BROADCOM CORPORATION
Reel/Frame 032045/0071 →