IP Library Granted Patent US 9,136,263
Granted Patent B2
US 9,136,263 · App. 14/166,937 · Granted Sep 15, 2015

Semiconductor device

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Quick Facts
Patent No.
US 9,136,263
App. No.
14/166,937
Granted
Sep 15, 2015
Kind
B2
Abstract

Provided is a semiconductor device which uses a comb-like N-type MOS transistor as an ESD protection element and is capable of uniformly operating the entire comb-like N-type MOS transistor. By adjusting a length L of a gate electrode of the N-type MOS transistor used as the ESD protection element in accordance with the distance from a contact for fixing a substrate potential, which is provided on a guard ring around an outer periphery, respective portion of N-type MOS transistor represented as a comb teeth uniformly enter snap-back operation, permitting avoidance of local concentration of current and obtainment of a desired ESD tolerance.

Claims (23)

1. A semiconductor device having an ESD protection element which utilizes an N-type MOS transistor having an integral structure of a plurality of transistors, the semiconductor device comprising:

a plurality of drain regions and a plurality of source regions alternately arranged each other;

a gate electrode formed between each of the plurality of drain regions and each of the plurality of source regions; and

a substrate contact to which a metal interconnecting line fixed at a ground potential is connected, the substrate contact being formed around the plurality of drain regions, the plurality of source regions, and the gate electrode,

wherein a length L, which is a length of the gate electrode in a channel direction, of a comb tooth of the gate electrode formed close to the substrate contact is smaller than the L length of a comb tooth formed away from the substrate contact.

2. A semiconductor device according to claim 1 , wherein the L length of the gate electrode is reduced as a distance from the substrate contact arranged in parallel with a channel width direction of the gate electrode becomes smaller.

3. A semiconductor device according to claim 1 , wherein the L length of the gate electrode is reduced as a distance from the substrate contact arranged in parallel with a channel length direction of the gate electrode becomes smaller.

4. A semiconductor device according to claim 1 , wherein the L length of the comb teeth of the gate electrode becomes smaller as a distance from the substrate contacts arranged in parallel with a channel width direction of the comb teeth becomes smaller.

5. A semiconductor device according to claim 2 , wherein the substrate contact is provided only on two sides in parallel with the channel width direction of the gate electrode.

6. A semiconductor device according to claim 3 , wherein the substrate contact is provided only on two sides in parallel with the L length direction of the gate electrode.

7. A semiconductor device according to claim 4 , wherein the substrate contacts are provided only on two sides of the guard ring in parallel with the channel width direction of the comb teeth.

8. A semiconductor device having an ESD protection element which utilizes an N-type MOS transistor having an integral structure of a plurality of transistors, the semiconductor device comprising:

a plurality of drain regions alternately arranged with a plurality of source regions;

a gate electrode provided between each adjacent pair of alternating drain and source regions and;

a plurality of substrate contacts formed around and spaced from the drain regions, source regions and gate electrode and connected to a metal interconnecting line fixed at a ground potential,

wherein a channel length L of the gate electrode between the pairs of alternating drain and source regions is reduced as a distance of the gate electrode from the substrate contacts becomes smaller.

9. A semiconductor device having an ESD protection element which utilizes an N-type MOS transistor having an integral structure of a plurality of transistors, the semiconductor device comprising:

a plurality of drain regions alternately arranged with a plurality of source regions;

a gate electrode having a comb configuration with comb teeth, each comb tooth extending between an adjacent pair of drain and source regions; and

a guard ring having substrate contacts to which a metal interconnecting line fixed at a ground potential is connected, the guard ring being formed around the drain regions, the source regions, and the gate electrode,

wherein a length L, which is a length of the gate electrode in a channel direction, of a comb tooth of the gate electrode located closer to the substrate contacts is smaller than the L length of a comb tooth located farther from the substrate contacts.

10. A semiconductor device according to claim 9 , wherein the L length of the comb teeth of the gate electrode becomes smaller as a distance from the substrate contacts arranged in parallel with a channel length direction of the comb teeth becomes smaller.

11. A semiconductor device according to claim 10 , wherein the substrate contacts are provided only on two sides of the guard ring in parallel with the L length direction of the comb teeth.

Assignments (3)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: SEIKO INSTRUMENTS INC.
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 038058/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2014
From: KOYAMA, TAKESHI; RISAKI, TOMOMITSU
To: SEIKO INSTRUMENTS INC.
Reel/Frame 032155/0141 →