CMOS ultrasonic transducers and related apparatus and methods
CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.
1. A method comprising:
depositing a first conductive layer on a silicon wafer;
depositing a second conductive layer on the first conductive layer;
depositing a first layer of SiO 2 on the second conductive layer;
etching at least one cavity in the first layer of SiO 2 , a bottom surface of the at least one cavity corresponding to the second conductive layer;
depositing a second layer of SiO 2 on the first layer of SiO 2 ;
planarizing the second layer of SiO 2 ;
bonding a second wafer comprising silicon to the silicon wafer with a fusion bond;
thinning a backside of the second wafer distal the at least one cavity to form a membrane over the at least one cavity; and
depositing a third conductive layer on the membrane.
2. The method of claim 1 , wherein the first conductive layer comprises aluminum.
3. The method of claim 1 , wherein the second conductive layer comprises TiN.
4. The method of claim 1 , wherein depositing the first layer of SiO 2 is performed via TEOS.
5. The method of claim 1 , wherein the method does not involve any steps performed at higher than 450° C.
6. The method of claim 1 , wherein the silicon wafer has a complementary metal oxide semiconductor (CMOS) circuit formed therein, and wherein the method further comprises electrically connecting the third conductive layer to the CMOS circuit.