IP Library Granted Patent US 9,553,500
Granted Patent B2
US 9,553,500 · App. 14/173,439 · Granted Jan 24, 2017

Inverter for a distributed power generator

Inventors: Ali Khajehoddin (Edmonton, CA); Praveen K. Jain (Kingston, CA); Alireza Bakhshai (Kingston, CA)
Assignee: SPARQ Systems Inc.
H02M1/14G05F1/67H01L31/02021H02J3/383H02M7/48H02M1/12Y02E10/563Y02E10/58
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Quick Facts
Patent No.
US 9,553,500
App. No.
14/173,439
Granted
Jan 24, 2017
Kind
B2
Abstract

Provided is a maximum power point (MPP) tracker for a PV cell inverter, and a PV cell inverter. The MPP tracker decouples output power oscillations from the input power generation and extracts maximum available power from the PV cell. The PV cell inverter uses the MPP tracker and generates a sinusoidal output current from the MPP tracker output. The sinusoidal output current may be fed to a power distribution grid. The PV cell inverter may use a pulse width modulation technique to cancel harmonics in the sinusoidal output current. The circuits use a minimum number of components and avoid use of large electrolytic capacitors.

Claims (68)

1. A compensator, comprising:

an input that receives a signal corresponding to a voltage source inverter input voltage or a current source inverter input current and generates a compensation signal representing a deviation of the voltage source inverter input voltage or the current source inverter input current from a DC value;

an input that receives a pulse width modulation reference signal and modifies the pulse width modulation reference signal according to the compensation signal, and produce a modified pulse width modulation reference signal; and

an output that provides the modified pulse width modulation reference signal to a pulse width modulator;

wherein the modified pulse width modulation reference signal controls the pulse width modulator such that a harmonic in a voltage source inverter output current or a current source inverter output current is substantially reduced;

wherein the harmonic arises from voltage source inverter input voltage oscillation or current source inverter input current oscillation.

2. The compensator of claim 1 , wherein the pulse width modulation reference signal is modified in proportion to the compensation signal;

wherein the compensation signal is a ratio of average and instantaneous values of the voltage source inverter input voltage or the current source inverter input current.

3. The compensator of claim 1 , wherein:

the voltage source inverter output current or the current source inverter output current is connected to a power distribution grid having a grid frequency; and

wherein at least one harmonic that is substantially reduced is at a frequency that is twice the grid frequency.

4. The compensator of claim 1 , wherein the compensator is connected to a circuit comprising:

a high side input point and a low side input point for connection to a distributed power generator;

a parallel input capacitor connected across the high side input point and the low side input point; and

a first regulating circuit connected in parallel with the parallel input capacitor, the first regulating circuit having a high side output point connected to the voltage source inverter input so as to provide the voltage source inverter input voltage;

wherein the parallel input capacitor has a small value such that voltage source inverter input voltage oscillation is not substantially reduced.

5. The compensator of claim 4 , wherein the first regulating circuit comprises:

a switch connected between the high side input point and a node;

an output inductor connected between the node and the high side output point; and

a diode connected between the node and a low side output point.

6. The compensator of claim 4 , wherein the first regulating circuit regulates voltage across the parallel input capacitor between a lower limit and an upper limit;

wherein the upper limit is a reference voltage and the lower limit is selected so that a switching frequency of the switch and voltage oscillation across the parallel input capacitor do not exceed selected values.

7. The compensator of claim 6 , Wherein the reference voltage is obtained from a maximum power point tracking (MPPT) algorithm.

8. The compensator of claim 1 , wherein the compensator is connected to a circuit comprising:

a high side input point and a low side input point for connection to a distributed power generator;

a series input inductor having a first terminal and a second terminal, the first terminal connected to one of the high side input point and the low side input point; and

a second regulating circuit connected between the second terminal of the series input inductor and the other of the high side input point and the low side input point, the second regulating circuit having a high side output point connected to the current source inverter input so as to provide the current source inverter input current;

wherein the series input inductor has a small value such that current source inverter input current oscillation is not substantially reduced.

9. The compensator of claim 8 , wherein the second regulating circuit comprises:

a switch connected between the second terminal of the series input inductor and the other of the high side input point and the low side input point; and

a diode connected in series between the second terminal of the series input inductor and a corresponding high side output point or low side output point.

10. The compensator of claim 8 , wherein the second regulating circuit regulates current through the series input inductor between a lower limit and an upper limit;

wherein the upper limit is a reference current and the lower limit is selected so that a switching frequency of the switch and current oscillation through the series input inductor do not exceed selected values.

11. The compensator of claim 10 , wherein the reference current is obtained from a maximum power point tracking (MPPT) algorithm.

12. The compensator of claim 4 , wherein the distributed power generator comprises a photovoltaic cell.

13. The compensator of claim 8 , Wherein the distributed power generator comprises a photovoltaic cell.

14. A method for controlling a voltage source inverter or a current source inverter, comprising:

receiving a signal corresponding to an input voltage of the voltage source inverter or an input current of the current source inverter and generating a compensation signal representing a deviation of the voltage source inverter input voltage or the current source inverter input current from a DC value;

modifying a pulse width modulation reference signal according to the compensation signal; and

outputting the modified pulse width modulation reference signal to a pulse width modulator;

wherein the pulse width modulator controls a voltage source inverter or a current source inverter such that a harmonic in the voltage source inverter output current or current source inverter output current is substantially reduced;

wherein the harmonic arises from voltage source inverter input voltage oscillation or current source inverter input current oscillation.

15. The method of claim 14 , comprising modifying the pulse width modulation reference signal in proportion to the compensation signal, wherein the compensation signal is a ratio of average and instantaneous values of the voltage source inverter input voltage or the current source inverter input current.

16. The method of claim 14 , comprising:

connecting the voltage source inverter output current or the current source inverter output current to a power distribution grid having a grid frequency; and

substantially reducing at least one harmonic at a frequency that is twice the grid frequency.

17. The method of claim 14 , further comprising:

using a first regulating circuit to provide the voltage source inverter input voltage, the first regulating circuit including:

a high side input point and a low side input point for connection to a distributed power generator; and

a parallel input capacitor connected across the high side input point and the low side input point; and

selecting a small value of the parallel input capacitor such that voltage source inverter input voltage oscillation is not substantially reduced.

18. The method of claim 17 , comprising:

operating the first regulating circuit to regulate voltage across the parallel input capacitor between a lower limit and an upper limit;

wherein the upper limit is a reference voltage; and

selecting the lower limit so that a switching frequency of a switch of the first regulating circuit and voltage oscillation across the parallel input capacitor do not exceed selected values.

19. The method of claim 18 , comprising obtaining the reference voltage from a maximum power point tracking (MPPT) algorithm.

20. The method of claim 14 , further comprising:

using a second regulating circuit to provide the current source inverter input current, the second regulating circuit including:

a high side input point and a low side input point for connection to a distributed power generator; and

a series input inductor connected in series with the high side input point or the low side input point; and

selecting a small value of the series input inductor such that current source inverter input current oscillation is not substantially reduced.

21. The method of claim 20 , comprising:

operating the second regulating circuit to regulate current through the series input inductor between a lower limit and an upper limit;

wherein the upper limit is a reference current; and

selecting the lower limit so that a switching frequency of a switch of the second regulating circuit and current oscillation through the series input inductor do not exceed selected values.

22. The method of claim 21 , comprising obtaining the reference current from a maximum power point tracking (MPPT) algorithm.

23. The method of claim 17 , wherein the distributed power generator comprises a photovoltaic cell.

24. The method of claim 20 , wherein the distributed power generator comprises a photovoltaic cell.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 17, 2017
From: COMERICA BANK
To: SPARQ SYSTEMS INC.
Reel/Frame 044161/0493 →
SECURITY INTEREST Recorded Sep 2, 2015
From: SPARQ SYSTEMS INC.
To: COMERICA BANK
Reel/Frame 036476/0088 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2014
From: KHAJEHODDIN, SAYED ALI; JAIN, PRAVEEN; BAKHSHAI, ALIREZA
To: QUEEN'S UNIVERSITY AT KINGSTON
Reel/Frame 032572/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2014
From: QUEEN'S UNIVERSITY AT KINGSTON
To: SPARQ SYSTEMS INC.
Reel/Frame 032573/0048 →
Priority Claims (1)
CA 2655007 · Feb 20, 2009 · national
Continuity (3)
Division 12709166 · Feb 19, 2010
Provisional Application 61202355 · Feb 20, 2009
Related Publication 20140192568A1 · Jul 10, 2014