Thin film transistor array panel for a display and manufacturing method thereof

1. A thin film transistor array panel, comprising:

a substrate;

a data line formed on the substrate

color filters covering at least a portion of the data line;

a shielding electrode formed on the color filters, the shielding electrode overlapping an entire surface of the data line distal from the substrate; and

a pixel electrode formed on the color filters and separated from the shielding electrode

wherein the color filters are of different colors and overlap each other on the data line, and

wherein the shielding electrode includes a copper (Cu) layer, an indium zinc oxide (IZO) layer, and a titanium (Ti) layer that are formed one above another.

2. The thin film transistor array panel of claim 1 , wherein a reflectivity of the shielding electrode is in a range from about 5 to about 10%.

3. The thin film transistor array panel of claim 1 , wherein a thickness of the titanium layer is in a range from about 70 Å to about 200 Å.

4. The thin film transistor array panel of claim 1 , wherein a thickness of the indium zinc oxide layer is in a range from about 400 Å to about 1000 Å.

5. The thin film transistor array panel of claim 1 , wherein a thickness of the copper layer is in a range from about 500 Å to about 1000 Å.

6. A thin film transistor array panel, comprising:

a substrate;

a data line formed on the substrate

a color filter covering at least a portion of the data line;

a shielding electrode formed on the color filter, the shielding electrode overlapping the data line; and

a pixel electrode formed on the color filter and separated from the shielding electrode,

wherein the shielding electrode comprises a a first layer that includes a copper (Cu) layer, a second layer that includes zinc oxide (ZnO), gallium zinc oxide (GZO), zinc indium oxide (ZIO), or zinc aluminum oxide (ZAO), and a third layer that includes a titanium (Ti) layer, that are formed one above another.

7. A method of manufacturing a display panel, the method comprising:

sequentially depositing a copper layer on a substrate, an indium zinc oxide layer on the copper layer, and a titanium layer on the indium zinc oxide layer;

etching the deposited copper, indium zinc oxide, and titanium layers to form a shielding electrode;

forming a transparent conductive layer on the substrate including the shielding electrode; and

etching the transparent conductive layer to form a pixel electrode separated from the shielding electrode and to remove the transparent conductive layer formed on the shielding electrode.

8. The manufacturing method of claim 7 , wherein a thickness of the copper layer is in a range from about 500 Å to about 1000 Å.

9. The manufacturing method of claim 7 , wherein a thickness of the indium zinc oxide layer is in a range from about 400 Å to about 1000 Å.

10. The manufacturing method of claim 7 , wherein a thickness of the titanium layer is in a range from about 70 Å to about 200 Å.

11. A method of manufacturing a display panel, the method comprising:

depositing a copper layer on a substrate;

depositing on the copper layer a transparent conductive material including zinc oxide (ZnO), gallium zinc oxide (GZO), zinc indium oxide (ZIO), or zinc aluminum oxide (ZAO),

depositing a titanium layer on the transparent conductive material;

etching the deposited layers to form a shielding electrode;

forming a transparent conductive layer on the substrate including the shielding electrode; and

etching the transparent conductive layer to form a pixel electrode separated from the shielding electrode and to remove the transparent conductive layer formed on the shielding electrode.

12. The manufacturing method of claim 11 , wherein etching the shielding electrode includes using a titanium etchant or a copper etchant.

13. A display panel, comprising:

a substrate;

a data line formed on the substrate;

color filters covering at least a portion of the data line;

a shielding electrode formed on the color filters, the shielding electrode overlapping an entire surface of the data line distal from the substrate; and

a pixel electrode formed on the color filters and electrically separated from the shielding electrode,

wherein the color filters are of different colors and overlap each other on the data line, and

wherein the shielding electrode includes a copper (Cu) layer, an indium zinc oxide (IZO) layer, and a titanium (Ti) layer that are formed one above another.

14. The display panel of claim 13 , wherein a common voltage is applied to the shielding electrode.

15. The display panel of claim 13 , further comprising an overcoat layer between the color filter and the shielding electrode.