COMPUTING DEVICE, A SYSTEM AND A METHOD FOR PARALLEL PROCESSING OF DATA STREAMS
An apparatus for identification of an input data against one or more learned signals is provided. The apparatus comprising a number of computational cores, each core comprises properties having at least some statistical independency from other of the computational, the properties being set independently of each other core, each core being able to independently produce an output indicating recognition of a previously learned signal, the apparatus being further configured to process the produced outputs from the number of computational cores and determining an identification of the input data based the produced outputs.
1 . An apparatus for processing a data stream, comprising:
a processing unit comprised of a plurality of computational cores, each computational core is configured to receive an input data and provide a unique output data, each computational core is randomly programmed prior to receiving the input data to produce the unique output data respective of the input data, wherein at least two of the plurality of computational cores operate in parallel;
an input interface configured to receive the data stream and simultaneously provide the received data stream to each of the inputs of the plurality of computational cores; and
an output interface configure to simultaneously receive the output data from each of the plurality of computational cores.
2 . The apparatus of claim 1 , further comprising:
at least one register configured to be updated responsive of the output data.
3 . The apparatus of claim 2 , wherein the at least one register contains at least one of: a mode of operation of the plurality of the computation cores, the input data, the output data, and an outcome indication respective of the output data.
4 . The apparatus of claim 3 , wherein the outcome indication is at least one of: winner-takes-all, majority voting, and statistical analysis.
5 . The apparatus of claim 3 , wherein the outcome indication is provided respective of a determination whether the plurality of computational cores identified the input data.
6 . The apparatus of claim 1 , wherein the input data comprises temporal data.
7 . The apparatus of claim 6 , wherein the temporal data comprises at least a segment of binary streaming data.
8 . The apparatus of claim 1 , wherein the apparatus is configured to be asynchronously adaptive with respect of the input data.
9 . The apparatus of claim 1 , wherein the apparatus is configured to perform respective of the input data a task including at least one of: filtering unknown data streams, image recognition, speech recognition, clustering, indexing, routing, video signals analysis, video indexing, categorization, string matching, recognition tasks, verification tasks, tagging, and outliner detection.
10 . The apparatus of claim 1 , wherein the input data comprises at least one of: signals, streams of signals, string, regular expression, sensor output signals, database records, processor outputs, naturally structured signals, speech signals, image signals, physiological signals, medical signals, and text signals.
11 . The apparatus of claim 1 , wherein randomly programming each of the plurality of computational cores comprises:
preprogramming each computational core with a respective function.
12 . The apparatus of claim 11 , wherein a statistical distribution is used to generate the respective function for each of the plurality of computational cores.
13 . The apparatus of claim 12 , wherein the statistical distribution is a Gaussian distribution.
14 . The apparatus of claim 1 , wherein the plurality of computational cores is divided to a plurality of subgroups of computational cores, wherein each of the subgroups of computational cores is configured for mapping variants of the input data.
15 . The apparatus of claim 1 , wherein the processing unit is configured to capture at least one intrinsic dimension of the input data.
16 . The apparatus of claim 1 , wherein at least one of the computation cores of the processing unit is a leaky integrate-to-threshold unit.
17 . The apparatus of claim 16 , wherein at least one of the computation cores of the processing unit is a coupling node unit.
18 . The apparatus of claim 17 , wherein the coupling node unit is configured to connect between at least a first leaky integrate-to-threshold unit and a second leaky integrate-to-threshold unit.
19 . An integrated circuit comprising the apparatus of claim 1 .
20 . A method for processing a data stream, comprising:
randomly programming a plurality of computational cores of a processing unit;
configuring at least two of the plurality of computational cores to operate in parallel;
receiving the data stream;
simultaneously providing the received data stream to each of the inputs of the at least two computational cores; and
configuring of the at least two computational cores to receive data stream and to provide a unique output data respective of the input data stream.