Apparatus and method for communicating data over a communication channel
View Patent ↗For some applications such as high-speed communication over short-reach links, the complexity and associated high latency provided by existing modulators may be unsuitable. According to an aspect, the present disclosure provides a modulator that can reduce latency for applications such as 40 G/100 G communication over copper cables or SMF. The modulator has a symbol mapper for mapping a bit stream into symbols, and a multi-level encoder including an inner encoder and an outer encoder for encoding only a portion of the bit stream. In some implementations, the multi-level encoder is configured such that an information block size of the inner encoder is small and matches a field size of the outer encoder. Therefore, components that would be used to accommodate larger block sizes can be omitted. The effect is that complexity and latency can be reduced. According to another aspect, the present disclosure provides a demodulator that is complementary to the modulator.
1. A modulator comprising:
a symbol mapper for mapping a bit stream into symbols; and
a multi-level encoder comprising an inner encoder and an outer encoder for encoding only a portion of the bit stream such that an information block size of the inner encoder matches a field size of the outer encoder;
wherein:
the portion of the bit stream comprises an LSB (Least Significant Bit) sequence;
the bit stream further comprises a non-LSB sequence having (N−1)-times as many bits as the LSB sequence; and
the symbol mapper is configured for mapping the bit stream into symbols from a constellation of 2 N -PAM symbols, where N is an integer and is constant from symbol to symbol.
2. The modulator of claim 1 , wherein:
the inner encoder is a block encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
3. The modulator of claim 1 , wherein:
the inner encoder is a Hamming or Extended Hamming encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
4. The modulator of claim 1 , wherein:
the inner encoder is a single-parity-check encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
5. The modulator of claim 1 , further comprising:
a second encoder for encoding a non-LSB sequence of the bit stream.
6. The modulator of claim 5 , wherein the second encoder is an RS (Reed-Solomon) encoder.
7. The modulator of claim 1 , wherein the symbol mapper performs the mapping without a non-LSB sequence of the bit stream being encoded.
8. The modulator of claim 1 , wherein the field size of the outer encoder is at least 9.
9. A modulator comprising:
a symbol mapper for mapping a bit stream into symbols; and
a multi-level encoder comprising an inner encoder and an outer encoder for encoding only a portion of the bit stream such that an information block size of the inner encoder matches a field size of the outer encoder;
wherein:
the portion of the bit stream comprises an LSB (Least Significant Bit) sequence;
the bit stream further comprises a non-LSB sequence having p-times as many bits as the LSB sequence, where p is an average number of bits per LSB; and
the symbol mapper is configured for mapping the bit stream into symbols from a constellation of 2 N symbols, where N is an integer and is variable from symbol to symbol.
10. The modulator of claim 9 , wherein:
the inner encoder is a block encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
11. The modulator of claim 9 , wherein:
the inner encoder is a Hamming or Extended Hamming encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
12. The modulator of claim 9 , wherein:
the inner encoder is a single-parity-check encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
13. The modulator of claim 9 , further comprising:
a second encoder for encoding a non-LSB sequence of the bit stream.
14. The modulator of claim 13 , wherein the second encoder is an RS (Reed-Solomon) encoder.
15. The modulator of claim 9 , wherein the symbol mapper performs the mapping without a non-LSB sequence of the bit stream being encoded.
16. The modulator of claim 9 , wherein the field size of the outer encoder is at least 9.
17. The A modulator comprising:
a symbol mapper for mapping a bit stream into symbols, the bit stream comprising an LSB (Least Significant Bit) sequence; and
a multi-level encoder comprising an inner encoder and an outer encoder for encoding only the LSB sequence of the bit stream;
wherein:
the inner encoder and the outer encoder are configured such that an information block size of the inner encoder matches a field size of the outer encoder;
the bit stream further comprises a non-LSB sequence having (N−1)-times as many bits as the LSB sequence; and
the symbol mapper is configured for mapping the bit stream into symbols from a constellation of 2 N -PAM symbols, where N is an integer and is constant from symbol to symbol.
18. The modulator of claim 17 , wherein the inner encoder and the outer encoder are configured such that an information block size of the inner encoder matches a field size of the outer encoder.
19. The modulator of claim 18 , wherein the field size of the outer encoder is at least 9.
20. The modulator of claim 17 , wherein:
the inner encoder is a block encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
21. The modulator of claim 17 , wherein:
the inner encoder is a Hamming or Extended Hamming encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
22. The modulator of claim 17 , wherein:
the inner encoder is a single-parity-check encoder; and
the outer encoder is an RS (Reed-Solomon) encoder.
23. The modulator of claim 17 , further comprising:
a second encoder for encoding a non-LSB sequence of the bit stream.
24. The modulator of claim 23 , wherein the second encoder is an RS (Reed-Solomon) encoder.
25. The modulator of claim 17 , wherein the symbol mapper performs the mapping without a non-LSB sequence of the bit stream being encoded.
26. A modulator comprising:
a symbol mapper for mapping a bit stream into symbols, the bit stream comprising an LSB (Least Significant Bit) sequence; and
a multi-level encoder comprising an inner encoder and an outer encoder for encoding only the LSB sequence of the bit stream;
wherein:
the inner encoder and the outer encoder are configured such that an information block size of the inner encoder matches a field size of the outer encoder;
the bit stream further comprises a non-LSB sequence having p-times as many bits as the LSB sequence, where p is an average number of bits per LSB; and
the symbol mapper is configured for mapping the bit stream into symbols from a constellation of 2 N symbols, where N is an integer and is variable from symbol to symbol.