IP Library Granted Patent US 9,767,303
Granted Patent B2
US 9,767,303 · App. 14/180,444 · Granted Sep 19, 2017

Authenticated memory and controller slave

Inventors: Christophe Carvounas (Le Plessis Trevise, FR); Joël LeBihan (Nantes, FR)
Assignee: MONTEREY RESEARCH, LLC
G06F21/6218G06F21/445G06F2221/2129
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Quick Facts
Patent No.
US 9,767,303
App. No.
14/180,444
Granted
Sep 19, 2017
Kind
B2
Abstract

Systems and methods that can facilitate the utilization of a memory as a slave to a host are presented. The host and memory can provide authentication information to each other and respective rights can be granted based in part on the respective authentication information. The host can determine the available functionality of the memory. The host can activate the desired functionality in the memory and can request memory to perform the desired function(s) with regard to data stored in the memory. An optimized controller component in the memory can facilitate performing the desired function(s) associated with the data to generate a result. The result can be provided to the host, while the data and associated information utilized to generate the result can remain in the memory and are cannot be accessed by the host.

Claims (46)

1. A system, comprising:

a memory that stores secure data and computer executable components; and

a processor that executes the following computer executable components stored within the memory:

an optimized controller component configured to:

in response to receiving a request, authenticate a host device associated with the memory and determine, based on the authentication of the host device, an availability of a task;

in response to determining the task is available, perform the task on the secure data to generate result data, wherein the memory stores the secure data, wherein the secure data is a subset of data other than a second subset of data that is used to access the secure data in the memory and other than a third subset of data that is used to decrypt the secure data, and wherein the host device is not permitted access to the secure data; and

transmit the result data to the host device without transmission of the secure data to the host device.

2. The system of claim 1 , further comprising an authentication component that authenticates the host devices based on comparing host authentication data of the request to memory authentication data stored in the memory.

3. The system of claim 1 , wherein the host device is external to the memory.

4. The system of claim 1 , wherein the optimized controller component is further configured to, in response to receiving the request, transmit availability data representing the availability of the task.

5. The system of claim 1 , wherein the optimized controller component is further configured to secure the secure data by storing the secure data in a portion of the memory, wherein the host device is denied access to the portion of the memory.

6. The system of claim 1 , wherein the optimized controller component is further configured to instruct the host device to delete the result data from a memory component of the host device based on occurrence of a triggering event.

7. The system of claim 1 , wherein the optimized controller component is further configured to determine the triggering event based on a display of the result data by the host device.

8. The system of claim 1 , wherein the optimized controller component is further configured to, in response to transmitting the result data, delete the result data.

9. The system of claim 1 , wherein the task relates to at least one of performing a calculation on the secure data or searching the secure data comprising a set of emails to determine an email of the set of emails that is responsive to the request, to generate the result data.

10. A method for secure data access, comprising:

employing a processor to execute computer executable components stored in an electronic memory device to perform the following acts:

receiving an operation request, from an external host device, representing a request to perform an operation on the secure data, wherein the secure data is stored in the electronic memory device and is a subset of data different from a second subset of data that is used to access the secure data in the electronic memory device and different from a third subset of data that is used to decrypt the secure data, and wherein the external host device is denied access to the secure data; and

in response to the operation request, determining, based on an authentication of the external host device, whether the operation is available;

in response to determining that the operation is available, performing the operation on the secure data to generate result data; and

in response to generating the result data, transmitting the result data to the external host device without transmitting the secure data to the external host device and deleting the result data from the electronic memory device.

11. The method of claim 10 , further comprising:

receiving, from the external host device, an availability request representing a request to identify whether one or more operations are available.

12. The method of claim 11 , further comprising:

in response to receiving the availability request, determining availability data representing availability of the one or more operations.

13. The method of claim 12 , further comprising:

transmitting the availability data to the external host device.

14. The method of claim 10 , further comprising:

in response to determining, based on the authentication, that the operation is not available, transmitting, to the external host device, denied access data that indicates the operation is not available.

15. The method of claim 10 , wherein performing the operation to generate the result data comprises searching the secure data stored in the electronic memory device and generating the result data based on the searching.

16. The method of claim 15 , wherein the secure data comprises secured message data associated with messages of a user identity, wherein the user identity is associated with the electronic memory device.

17. A host device communicatively coupled to an external memory device, the host device comprising:

a memory to store executable instructions; and

a processor, coupled to the memory, that facilitates execution of the executable instructions to perform operations, comprising:

transmitting access request data to the external memory device, wherein the request data comprises a request to identify a set of available functions associated with secure data stored in the external memory device, wherein the secure data is a subset of data other than a second subset of data that is used to access the secure data in the external memory device and other than a third subset of data that is used to decrypt the secure data;

receiving access result data, from the external memory device, that identifies the set of available functions;

selecting a function from the set of available functions;

transmitting a function request to the external memory device to facilitate execution of the selected function, of the set of available functions, on the secure data;

receiving result data representing a result of the execution of the function on the secure data without the host device receiving or being permitted access to the secure data stored in the external memory device; and

disposing the result data after processing the result data.

18. The host device of claim 17 , wherein disposing of the result data after processing the result data comprises removing the result data from a memory device of the host device after displaying the result data.

19. The host device of claim 17 , wherein the operations further comprise:

authenticating the external memory device based on authentication data.

20. The host device of claim 19 , wherein the authenticating the external memory device comprises:

transmitting host authentication data of the authentication data to the external memory device; and

receiving memory authentication data of the authentication data from the external memory device.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040028/0054 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2015
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 035896/0149 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2014
From: CARVOUNAS, CHRISTOPHE; LEBIHAN, JOEL
To: SPANSION LLC
Reel/Frame 032217/0697 →
Continuity (2)
Continuation 11963538 · Dec 21, 2007
Related Publication 20140165217A1 · Jun 12, 2014