Method and system for encoding for 100G-KR networking
View Patent ↗Aspects of a method and system for encoding in 100G-KR networking are described. In one example embodiment, a coding method uses certain forward error correcting codes based on a given transcoding method and delivers the codes according to burst interleaving. In another example, a coding method includes receiving source data from a plurality of physical lanes, combining data from the physical lanes to generate a block, transcoding the block, and encoding a data stream including the transcoded block.
1. A coding method, comprising:
combining blocks from each of a plurality of physical lanes to generate a block;
transcoding the block to a transcoded block; and
encoding, with an encoder, a data stream consisting of a plurality of the transcoded blocks into encoded symbols, wherein the encoding comprises:
receiving A symbols of the plurality of transcoded blocks for a first B cycles, where A and B are non-zero integer values;
accessing two or more symbols at a given cycle for each forward error correction (FEC) frame generated based on the plurality of transcoded blocks; and
providing, from the encoder, C symbols per cycle, where C is a non-zero integer value equal to A.
2. The coding method of claim 1 , wherein the block is one of a 132, 264, 396, 528, 536, 544, 660, or 792-bit block.
3. The method of claim 1 , wherein A is equal to one of 16, 24, and 32, and B is equal to one of 16, 17, 21, 22, 32, and 33.
4. The coding method of claim 1 , wherein the accessing comprises accessing two symbols at a last cycle for each FEC frame, and the providing comprises providing four symbols per cycle over each physical lane for a total of thirty-three cycles to transmit a single FEC frame.
5. The coding method of claim 4 , wherein the encoding is based on Reed-Solomon (RS) codes, RS (N, K, t), wherein N is a total number of symbols of coded data, K is a total number of symbols of source data, and t is an error correcting capacity in units of symbols, wherein N is equal to 528, K is equal to 514, and t is equal to 7, RS (N, K, t) defined over a Galois field of 2^10.
6. The coding method of claim 1 , wherein the accessing comprises accessing two symbols at a thirty-third cycle for each FEC frame and no data is accessed at a last cycle of each FEC frame, and the providing comprises providing four symbols per cycle over each physical lane for a total of thirty-four cycles to transmit a single FEC frame.
7. The coding method of claim 6 , wherein the encoding is based on Reed-Solomon (RS) codes, RS (N, K, t), wherein N is a total number of symbols of coded data, K is a total number of symbols of source data, and t is an error correcting capacity in units of symbols, wherein N is equal to 544, K is equal to 514, and t is equal to 15, RS (N, K, t) defined over a Galois field of 2^10.
8. The coding method of claim 1 , wherein the accessing comprises accessing at a last cycle for each FEC frame, and the providing comprises providing eight symbols per cycle over each physical lane for a total of seventeen cycles to transmit a single FEC frame.
9. The coding method of claim 8 , wherein the encoding is based on Reed-Solomon (RS) codes, RS (N, K, t), wherein N is a total number of symbols of coded data, K is a total number of symbols of source data, and t is an error correcting capacity in units of symbols, wherein N is equal to 544, K is equal to 514, and t is equal to 15, RS (N, K, t) defined over a Galois field of 2^10.
10. The coding method of claim 1 , wherein the accessing comprises accessing at a thirty-third cycle for each FEC frame, and the providing comprises providing four symbols per cycle over each physical lane for a total of 32 cycles and providing two symbols over each physical lane for the thirty-third cycle, to transmit a single FEC frame.
11. The coding method of claim 10 , wherein the encoding is based on Reed-Solomon (RS) codes, RS (N, K, t), wherein N is a total number of symbols of coded data, K is a total number of symbols of source data, and t is an error correcting capacity in units of symbols, wherein N is equal to 536, K is equal to 514, and t is equal to 11, RS (N, K, t) defined over a Galois field of 2^10.
12. The coding method of claim 1 , wherein the accessing comprises accessing ten symbols at a last cycle for each FEC frame, and the providing comprises providing six symbols per cycle over each physical lane for a total of twenty-two cycles to transmit a single FEC frame.
13. The coding method of claim 12 , wherein the encoding is based on Reed-Solomon (RS) codes, RS (N, K, t), wherein N is a total number of symbols of coded data, K is a total number of symbols of source data, and t is an error correcting capacity in units of symbols, wherein N is equal to 528, K is equal to 514, and t is equal to 7, RS (N, K, t) defined over a Galois field of 2^10.
14. The coding method of claim 1 , further comprising burst interleaving the encoded symbols, the burst interleaving comprising single symbol based interleaving or multiple symbol based interleaving.
15. A coding system, comprising:
one or more circuits configured to:
combine blocks from each of a plurality of physical lanes to generate a block;
transcode the block to a transcoded block;
receive A symbols of a plurality of the transcoded blocks for a first B cycles, where A and B are non-zero integer values;
access two or more symbols at a given cycle for each forward error correction (FEC) frame generated based on the plurality of transcoded blocks; and
provide C symbols per cycle, where C is a non-zero integer value equal to A.
16. The coding system of claim 15 , wherein the block is one of a 132, 264, 396, 528, 536, 544, 660, or 792-bit block.
17. The coding system of claim 15 , wherein A is equal to one of 16, 24, and 32, and B is equal to one of 32, 21, and 16.
18. The coding system of claim 15 , wherein the one or more circuits are further configured to:
access two symbols at a last cycle for each FEC frame; and
provide four symbols per cycle over each physical lane for a total of thirty-three cycles to transmit a single FEC frame.
19. A non-transitory computer-readable medium including instructions, which when executed by circuitry, cause the circuitry to:
combine blocks from each of a plurality of physical lanes to generate a block;
transcode the block to a transcoded block;
receive A symbols of a plurality of the transcoded blocks for a first B cycles, where A and B are non-zero integer values;
access two or more symbols at a given cycle for each forward error correction (FEC) frame generated based on the plurality of transcoded blocks; and
provide C symbols per cycle, where C is a non-zero integer value equal to A.
20. The non-transitory computer-readable medium of claim 19 , wherein
the block is one of a 132, 264, 396, 528, 536, 544, 660, or 792-bit block,
A is equal to one of 16, 24, and 32, and B is equal to one of 32, 21, and 16, and
the instructions further cause the circuitry to
access two symbols at a last cycle for each FEC frame; and
provide four symbols per cycle over each physical lane for a total of thirty-three cycles to transmit a single FEC frame.