IP Library Granted Patent US 9,416,003
Granted Patent B2
US 9,416,003 · App. 14/188,649 · Granted Aug 16, 2016

Semiconductor die with high pressure cavity

Inventor: Matthieu Lagouge (Singapore, SG)
Assignee: FREESCALE SEMICONDUCTOR, INC.
B81C1/00285B81B2201/0235B81B2201/0242B81C2203/0118
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Quick Facts
Patent No.
US 9,416,003
App. No.
14/188,649
Granted
Aug 16, 2016
Kind
B2
Abstract

A semiconductor die includes a device structure having a micro-electronic device located at a surface of a substrate and a cap coupled to the device structure with the micro-electronic device positioned in a cavity located between the cap and the substrate. A sacrificial material is provided within the cavity, coupling the cap to the device structure. The sacrificial material is heated in the cavity to cause the sacrificial material to decompose to a gaseous species. The presence of the gaseous species in the cavity increases a pressure level in the cavity from an initial pressure to a final pressure.

Claims (22)

1. A method of fabricating a semiconductor die that includes a device structure and a cap defining a hermetically sealed cavity, the device structure having a micro-electronic device located at a surface of a substrate, the method comprising:

providing a sacrificial material within the cavity, wherein the sacrificial material comprises a thermoplastic polymer;

coupling the cap to the device structure with the micro-electronic device positioned in the cavity; and

heating the sacrificial material in the cavity to cause the sacrificial material to decompose to a gaseous species to increase a pressure in the cavity from a first pressure level to a second pressure level,

wherein heating the sacrificial material is performed at a temperature sufficient to entirely decompose the sacrificial material to the gaseous species.

2. The method of claim 1 , wherein coupling the cap to the device structure and heating the sacrificial material are performed concurrently.

3. The method of claim 1 , wherein coupling the cap to the device structure and heating the sacrificial material are performed using eutectic bonding.

4. The method of claim 1 , wherein coupling the cap to the device structure and heating the sacrificial material are performed using thermocompression bonding.

5. The method of claim 1 , wherein heating the sacrificial material is performed after coupling the cap to the device structure.

6. The method of claim 1 , wherein heating the sacrificial material comprises performing an annealing process after coupling the cap to the device structure, wherein the annealing process heats the sacrificial material.

7. The method of claim 1 , wherein the micro-electronic device is a first micro-electronic device, the cavity is a first cavity, a second micro-electronic device is located at the surface of the substrate, the second micro-electronic device being laterally displaced from the first micro-electronic device, the cap and the surface define a second cavity, the method further comprising:

abstaining from providing the sacrificial material in the second cavity;

the coupling couples the cap to the device structure with the second micro-electronic device positioned in the second cavity, the pressure in each of the first and second cavities being at the first pressure level preceding the heating operation; and

the heating the sacrificial material decomposes the sacrificial material in the first cavity to increase the pressure in the first cavity to the second pressure level without changing the pressure in the second cavity from the first pressure level.

8. The method of claim 7 , wherein coupling the cap to the device structure is performed in a vacuum environment such that the first pressure level in each of the first and second cavities before the heating operations is less than standard atmospheric pressure.

9. A semiconductor die, comprising:

a device structure having a microelectronic device located at a surface of a substrate;

a cap coupled to the device structure with the microelectronic device positioned in a hermetically sealed cavity located between the cap and the substrate; and

a gaseous species of a sacrificial material located within the cavity, wherein the sacrificial material is entirely decomposed to produce the gaseous species and thereby increase a pressure in the cavity from a first pressure level to a second pressure level, and wherein the sacrificial material comprised a thermoplastic polymer.

10. The semiconductor die of claim 9 , wherein the sacrificial material is provided within the cavity prior to the cap being coupled to the device structure, and the sacrificial material is heated when the cap is coupled to the device structure to cause the sacrificial material to entirely decompose to the gaseous species.

11. The semiconductor die of claim 9 , wherein the microelectronic device is a first microelectronic device, the cavity is a first cavity, the device structure further comprises a second microelectronic device located at the surface of the substrate and laterally displaced away from the first microelectronic device, the second microelectronic device being positioned in a second cavity defined by the cap and the substrate, wherein the gaseous species of the sacrificial material is absent from the second cavity and the pressure in the second cavity is at the first pressure level.

12. The semiconductor die of claim 11 , wherein the first pressure level is less than standard atmospheric pressure, and the second pressure level is greater than the standard atmospheric pressure.

Assignments (18)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2026
From: NXP USA, INC.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 075126/0422 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE APPLICATION NUMBERS PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0438. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded May 12, 2016
From: CITIBANK, NA
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038665/0136 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT APPLICATION NUMBERS 12222918, 14185362, 14147598, 14185868 & 14196276 PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0479. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded May 12, 2016
From: CITIBANK, NA
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038665/0498 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0479 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0438 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0763 →
SUPPLEMENT TO SECURITY AGREEMENT Recorded May 7, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032845/0522 →
SUPPLEMENT TO SECURITY AGREEMENT Recorded May 7, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 032845/0497 →
SUPPLEMENT TO SECURITY AGREEMENT Recorded May 7, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032845/0442 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2014
From: LAGOUGE, MATTHIEU
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 032670/0813 →
Continuity (1)
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