IP Library Granted Patent US 9,252,170
Granted Patent B2
US 9,252,170 · App. 14/188,818 · Granted Feb 2, 2016

Solid-state imaging device and line sensor

Inventor: Ken Tomita (Iwate, JP)
Assignee: Kabushiki Kaisha Toshiba
H01L27/14603H01L27/14609H01L27/14614
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Quick Facts
Patent No.
US 9,252,170
App. No.
14/188,818
Granted
Feb 2, 2016
Kind
B2
Abstract

Certain embodiments provide a solid-state imaging device including a pixel portion, a charge storage portion, a first transfer gate portion, a charge detecting portion, a second transfer gate portion, and an offset gate portion. The charge storage portion stores the electrical charges generated in the pixel portion. The first transfer gate portion transfers electrical charges from the pixel portion to the charge storage portion, and the second transfer gate portion transfers the electrical charges from the charge storage portion to the charge detecting portion. The offset gate portion is provided between the second transfer gate portion and the charge detecting portion and is applied with a predetermined constant voltage. This offset gate portion includes an offset gate layer that has a plurality of projections formed at positions adjacent to the second transfer gate portion and an offset gate electrode.

Claims (54)

1. A solid-state imaging device comprising:

a pixel portion generating electrical charges according to an amount of received incident light;

a charge storage portion storing the electrical charges generated in the pixel portion;

a first transfer gate portion reading the electrical charges from the pixel portion and transferring the electrical charges to the charge storage portion;

a charge detecting portion to which the electrical charges stored in the charge storage portion are transferred and which causes a voltage drop corresponding to the amount of the transferred electrical charges to occur;

a second transfer gate portion reading the electrical charges stored in the charge storage portion and transferring the electrical charges to the charge detecting portion; and

an offset gate portion provided between the second transfer gate portion and the charge detecting portion and applied with a predetermined constant voltage,

wherein the offset gate portion includes an offset gate layer that is provided on a surface of a semiconductor substrate and has a plurality of projections at positions adjacent to the second transfer gate portion and an offset gate electrode that is formed on a surface of the semiconductor substrate, including the offset gate layer.

2. The solid-state imaging device according to claim 1 ,

wherein the plurality of projections have the same length with each other.

3. The solid-state imaging device according to claim 1 ,

wherein the plurality of projections have different lengths with each other.

4. The solid-state imaging device according to claim 3 ,

wherein the plurality of projections are formed such that a line connecting distal ends of these projections forms a mountain shape.

5. The solid-state imaging device according to claim 1 ,

wherein the offset gate layer is an impurity layer having an n-conductivity type.

6. The solid-state imaging device according to claim 1 , comprising

a plurality of the pixel portions, a plurality of the charge storage portions, a plurality of the first transfer gate portions, and a plurality of the second transfer gate portions,

wherein the plurality of the pixel portions are arranged in a line form, wherein each of the plurality of the pixel portions has a shape of which a longitudinal direction is the arrangement direction of the plurality of pixel portions,

the plurality of the charge storage portions are arranged in a line form in parallel to the arrangement direction of the plurality of pixel portions, and

the offset gate portion has a shape which has long sides extending in a longitudinal direction which is the arrangement direction of the plurality of pixel portions and short sides extending in a direction substantially perpendicular to the longitudinal direction, wherein the offset gate portion is provided between the plurality of second transfer gate portions and the charge detecting portion so that the long sides are adjacent to the plurality of second transfer gate portions.

7. The solid-state imaging device according to claim 6 ,

wherein the plurality of projections are formed on one side of the offset gate layer parallel to the longitudinal direction of the pixel portion.

8. A solid-state imaging device comprising:

a pixel portion generating electrical charges according to an amount of received incident light;

a charge detecting portion to which the electrical charges generated in the pixel portion are transferred and which causes a voltage drop corresponding to the amount of the transferred electrical charges to occur;

a transfer gate portion reading the electrical charges stored in the pixel portion and transferring the electrical charges to the charge detecting portion; and

an offset gate portion provided between the transfer gate portion and the charge detecting portion and applied with a predetermined constant voltage,

wherein the offset gate portion includes an offset gate layer that is provided on a surface of a semiconductor substrate and has a plurality of projections at positions adjacent to the transfer gate portion and an offset gate electrode that is formed on a surface of the semiconductor substrate, including the offset gate layer.

9. The solid-state imaging device according to claim 8 ,

wherein the plurality of projections have the same length with each other.

10. The solid-state imaging device according to claim 8 ,

wherein the plurality of projections have different lengths with each other.

11. The solid-state imaging device according to claim 10 ,

wherein the plurality of projections are formed such that a line connecting distal ends of these projections forms a mountain shape.

12. The solid-state imaging device according to claim 8 ,

wherein the offset gate layer is an impurity layer having an n-conductivity type.

13. A line sensor comprising:

a circuit board;

a plurality of solid-state imaging devices disposed in a straight line form on a surface of the circuit board;

a light guiding member disposed above the surface of the circuit board so as to emit light to a subject; and

a lens array disposed above the surface of the circuit board so as to focus the light reflected from the subject on the plurality of solid-state imaging devices,

wherein each of the plurality of solid-state imaging devices includes:

a pixel portion generating electrical charges according to an amount of received incident light;

a charge storage portion storing the electrical charges generated in the pixel portion;

a first transfer gate portion reading the electrical charges from the pixel portion and transferring the electrical charges to the charge storage portion;

a charge detecting portion to which the electrical charges stored in the charge storage portion are transferred and which causes a voltage drop corresponding to the amount of the transferred electrical charges to occur;

a second transfer gate portion reading the electrical charges stored in the charge storage portion and transferring the electrical charges to the charge detecting portion; and

an offset gate portion provided between the second transfer gate portion and the charge detecting portion and applied with a predetermined constant voltage, and

wherein the offset gate portion includes an offset gate layer that is provided on a surface of a semiconductor substrate and has a plurality of projections at positions adjacent to the second transfer gate portion and an offset gate electrode that is formed on a surface of the semiconductor substrate, including the offset gate layer.

14. The line sensor according to claim 13 ,

wherein the plurality of projections of the offset gate layer formed in the offset gate portion of the solid-state imaging device have the same length with each other.

15. The line sensor according to claim 13 ,

wherein the plurality of projections of the offset gate layer formed in the offset gate portion of the solid-state imaging device have different lengths with each other and are formed such that a line connecting distal ends of these projections forms a mountain shape.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2014
From: TOMITA, KEN
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 032508/0271 →
Priority Claims (1)
JP 2013-154542 · Jul 25, 2013 · national
Continuity (1)
Related Publication 20150028392A1 · Jan 29, 2015