IP Library Granted Patent US 9,390,909
Granted Patent B2
US 9,390,909 · App. 14/194,324 · Granted Jul 12, 2016

Soft landing nanolaminates for advanced patterning

Inventors: Frank L. Pasquale (Tualatin, OR); Shankar Swaminathan (Beaverton, OR); Adrien LaVoie (Newberg, OR); Nader Shamma (Cupertino, CA); Girish Dixit (San Jose, CA)
Assignee: Novellus Systems, Inc.
H01L21/02274C23C16/345C23C16/401C23C16/405C23C16/4554C23C16/45542H01L21/0217H01L21/0228H01L21/02164H01L21/02219H01L21/0337H01L22/12H01L22/20
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Quick Facts
Patent No.
US 9,390,909
App. No.
14/194,324
Granted
Jul 12, 2016
Kind
B2
Abstract

Methods for depositing nanolaminate protective layers over a core layer to enable deposition of high quality conformal films over the core layer for use in advanced multiple patterning schemes are provided. In certain embodiments, the methods involve depositing a thin silicon oxide or titanium oxide film using plasma-based atomic layer deposition techniques with a low high frequency radio frequency (HFRF) plasma power, followed by depositing a conformal titanium oxide film or spacer with a high HFRF plasma power.

Claims (32)

1. A method of processing a semiconductor substrate, the method comprising:

depositing a nanolaminate layer on the substrate; and

depositing a titanium oxide layer on the nanolaminate layer, the nanolaminate layer having a thickness of between about 15 Å and about 200 Å and a density lower than the density of the titanium oxide layer.

2. The method of claim 1 , further comprising depositing an amorphous carbon layer, wherein the nanolaminate layer is deposited on the amorphous carbon layer.

3. The method of claim 2 , wherein the amorphous carbon layer is a patterned layer.

4. The method of claim 1 , wherein the nanolaminate layer comprises a stack comprising two or more sublayers.

5. The method of claim 4 , wherein the two or more sublayers each comprise silicon oxide, or titanium oxide, or combinations thereof.

6. The method of claim 4 , wherein the stack comprises no more than two sublayers.

7. The method of claim 6 , wherein the nanolaminate layer comprises a first sublayer of silicon oxide and a second sublayer of titanium oxide.

8. The method of claim 1 , wherein the nanolaminate layer comprises silicon oxide or titanium oxide.

9. The method of claim 1 , wherein the nanolaminate layer is deposited using plasma-enhanced atomic layer deposition (PEALD) by:

exposing the substrate to a titanium-containing precursor or a silicon-containing precursor;

exposing the substrate to an oxidant; and

initiating a plasma while the substrate is exposed to the oxidant.

10. The method of claim 9 , wherein the nanolaminate layer is deposited at a temperature between about 50° C. and about 150° C. and the plasma is initiated at a high frequency radio frequency (HFRF) power per square millimeter of substrate area between about 1.768×10 −4 W per mm 2 and about 1.768×10 −3 W per mm 2 .

11. The method of claim 9 , wherein the nanolaminate layer is deposited at a temperature less than about 100° C.

12. The method of claim 9 , wherein the titanium-containing precursor comprises TDMAT.

13. The method of claim 1 , wherein the titanium oxide layer is deposited by PEALD by:

exposing the substrate to a titanium-containing precursor;

exposing the substrate to an oxidant; and

initiating a plasma while the substrate is exposed to the oxidant at a HFRF power per square millimeter of substrate area of at least about 1.768×10 −3 W per mm 2 .

14. The method of claim 13 , wherein the oxidant comprises nitrous oxide or oxygen or carbon dioxide or a mixture thereof.

15. The method of claim 13 , wherein the titanium-containing precursor comprises TDMAT.

16. The method of claim 13 , wherein the titanium oxide layer is deposited at a pressure between about 3 Torr and about 3.5 Torr.

17. The method of claim 13 , wherein the titanium oxide layer is deposited at a temperature between about 50° C. and about 400° C.

18. A method of processing a semiconductor substrate, the method comprising:

(a) exposing the substrate to a first titanium-containing precursor or a silicon-containing precursor;

(b) exposing the substrate to a first oxidant;

(c) initiating a first plasma while the substrate is exposed to the first oxidant with a HFRF power per square millimeter of substrate area between about 1.768×10 −4 W per mm 2 and about 1.768×10 −3 W per mm 2 ;

(d) exposing the substrate to a second titanium-containing precursor;

(e) exposing the substrate to a second oxidant; and

(f) initiating a second plasma while the substrate is exposed to the second oxidant with a HFRF power per square millimeter of substrate area of at least about 1.768×10 −3 W per mm 2 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2014
From: LAM RESEARCH CORPORATION
To: NOVELLUS SYSTEMS, INC.
Reel/Frame 034551/0454 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2014
From: PASQUALE, FRANK L.; SWAMINATHAN, SHANKAR; LAVOIE, ADRIEN; SHAMMA, NADER; DIXIT, GIRISH
To: LAM RESEARCH CORPORATION
Reel/Frame 032736/0863 →
Continuity (2)
Continuation In Part 14074617 · Nov 7, 2013
Related Publication 20150126042A1 · May 7, 2015