IP Library Granted Patent US 9,990,393
Granted Patent B2
US 9,990,393 · App. 14/195,550 · Granted Jun 5, 2018

Intelligent feed switch

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Quick Facts
Patent No.
US 9,990,393
App. No.
14/195,550
Granted
Jun 5, 2018
Kind
B2
Abstract

Various techniques are disclosed for offloading the processing of data packets. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize data from the data packets in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.

Claims (46)

1. An intelligent feed switch for processing data, the switch comprising:

a plurality of ports;

switching logic; and

a processor, wherein the processor comprises at least one member of the group consisting of a reconfigurable logic device, a graphics processor unit (GPU), and a chip multi-processor (CMP);

wherein the switching logic and processor are co-resident within the intelligent feed switch;

at least one of the ports being configured to receive a plurality of incoming feed-specific data packets, the feed-specific data packets corresponding to a plurality of different data feeds, the incoming feed-specific data packets comprising a plurality of messages, the messages comprising message data;

at least another of the ports being configured to output a plurality of outgoing data packets, the outgoing data packets comprising data that describes at least a portion of the message data;

wherein the at least one member comprises a processing pipeline;

wherein the processing pipeline is configured to analyze the message data of the messages on a data consumer-specific basis and repacketize the messages into a plurality of outgoing data consumer-specific data packets;

wherein the processing pipeline is further configured to perform the analysis and repacketization operations in a pipelined fashion as data packet data streams through the at least one member; and

wherein the switching logic is configured to determine a port for the outgoing data packets with reference to the incoming data packets.

2. The switch of claim 1 wherein the processing pipeline is further configured, as part of the analysis, perform a plurality of data consumer-specific search operations on the message data with respect to a plurality of search terms, the search terms being associated with the data consumers to find message data of interest to the data consumers.

3. The switch of claim 2 wherein the search operations comprise at least one member of the group consisting of an exact matching operation, an approximate match operation, and a regular expression pattern match operation.

4. The switch of claim 2 wherein the processing pipeline is further configured to, based on the search operations, store the message data found to be of interest to the data consumers in a plurality queues, each queue being associated with a data consumer such that the message data found to be of interest to a particular data consumers is stored in the queue associated with that data consumer.

5. The switch of claim 4 wherein the processing pipeline is further configured to generate the outgoing data packets from commonly-queued message data.

6. The switch of claim 5 wherein the processing pipeline is further configured to (1) select a queue from which to generate an outgoing data packet, (2) access packaging parameter data that is associated with the selected queue, and (3) generate an outgoing data packet from message data in the selected queue in accordance with the accessed packaging parameter data.

7. The switch of claim 1 wherein the processing pipeline is further configured to encrypt at least a portion of the messages.

8. The switch of 7 wherein the processing pipeline is further configured to perform different data consumer-specific encryption operations on the message data.

9. The switch of claim 1 wherein the processing pipeline is further configured to normalize at least a portion of the messages.

10. The switch of claim 9 wherein the processing pipeline is further configured to perform different data consumer-specific normalization operations on the message data.

11. The switch of claim 1 wherein the data feeds include at least one social network data feed.

12. The switch of claim 1 wherein the data feeds include at least one content aggregation feed.

13. The switch of claim 1 wherein the data feeds include at least one machine-readable news feed.

14. The switch of claim 1 wherein the switching logic is resident on the processor.

15. The switch of claim 1 wherein the at least one member comprises a field programmable gate array (FPGA).

16. The switch of claim 15 further comprising another FPGA, and wherein the switching logic is resident on the another FPGA.

17. The switch of claim 16 wherein the FPGAs are configured to communicate with each other via a custom interface.

18. The switch of claim 16 wherein the FPGAs are configured to communicate with each other via a PCI-express interface.

19. The switch of claim 16 wherein the FPGAs are configured to communicate with each other via a XAUI interface.

20. The switch of claim 16 wherein the FPGAs are configured to communicate with each other via an Ethernet interface.

21. The switch of claim 1 wherein the switching logic is resident on an application specific integrated circuit (ASIC).

22. The switch of claim 21 wherein the at least one member comprises a field programmable gate array (FPGA), wherein the ASIC and the FPGA are configured to communicate with each other via a custom interface.

23. The switch of claim 21 wherein the at least one member comprises a field programmable gate array (FPGA), wherein the ASIC and the FPGA are configured to communicate with each other via a PCI-express interface.

24. The switch of claim 21 wherein the at least one member comprises a field programmable gate array (FPGA), wherein the ASIC and the FPGA are configured to communicate with each other via a XAUI interface.

25. The switch of claim 21 wherein the at least one member comprises a field programmable gate array (FPGA), wherein the ASIC and the FPGA are configured to communicate with each other via an Ethernet interface.

26. The switch of claim 1 wherein the plurality of ports comprise a first, second, and third port.

27. The switch of claim 1 wherein at least a plurality of the received data packets comprise transmission control protocol (TCP) data packets, and wherein the processor is further configured to perform a TCP termination on at least a plurality of the received TCP data packets.

28. The switch of claim 2 wherein each of a plurality of the received incoming feed-specific data packets includes a header and a payload, wherein the messages are included in the payloads of the received incoming feed-specific data packets.

29. The switch of claim 28 wherein the processing pipeline is further configured to process the payloads of the received incoming feed-specific data packets to analyze the message data of the messages on the data consumer-specific basis.

30. The switch of claim 29 wherein each of a plurality of the outgoing data packets includes a header and a payload, wherein the processing pipeline is further configured to repacketize the messages into the payloads of the outgoing data packets so that the messages are grouped into outgoing data packets on the data consumer-specific basis.

31. The switch of claim 1 wherein each of a plurality of the received incoming feed-specific data packets includes a header and a payload, wherein the messages are included in the payloads of the received incoming feed-specific data packets.

32. The switch of claim 31 wherein the processing pipeline is further configured to process the payloads of the received incoming feed-specific data packets to analyze the message data of the messages on the data consumer-specific basis.

33. The switch of claim 32 wherein each of a plurality of the outgoing data packets includes a header and a payload, wherein the processing pipeline is further configured to repacketize the messages into the payloads of the outgoing data packets so that the messages are grouped into outgoing data packets on the data consumer-specific basis.

34. The switch of claim 2 wherein the data feeds include at least one social network data feed.

35. The switch of claim 2 wherein the data feeds include at least one content aggregation feed.

36. The switch of claim 2 wherein the data feeds include at least one machine-readable news feed.

Assignments (6)
SECURITY INTEREST Recorded May 20, 2021
From: OPTIONSCITY SOFTWARE, INC.; EXEGY INCORPORATED
To: SILICON VALLEY BANK
Reel/Frame 056302/0950 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 19, 2021
From: IP RESERVOIR, LLC
To: EXEGY INCORPORATED
Reel/Frame 055342/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2016
From: PARSONS, SCOTT; TAYLOR, DAVID E.; INDECK, RONALD S.
To: EXEGY INCORPORATED
Reel/Frame 037652/0719 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2016
From: EXEGY INCORPORATED
To: IP RESERVOIR, LLC
Reel/Frame 037652/0871 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2016
From: PARSONS, SCOTT; TAYLOR, DAVID E.; INDECK, RONALD S.
To: EXEGY INCORPORATED
Reel/Frame 037653/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2016
From: EXEGY INCORPORATED
To: IP RESERVOIR, LLC
Reel/Frame 037653/0158 →