IP Library Granted Patent US 9,196,502
Granted Patent B2
US 9,196,502 · App. 14/195,781 · Granted Nov 24, 2015

Semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 9,196,502
App. No.
14/195,781
Granted
Nov 24, 2015
Kind
B2
Abstract

A semiconductor device includes a substrate and memory cell transistors having a gate electrode above the substrate, and an oxide film. The gate electrode includes a charge storage layer above the substrate, a first insulating film on the charge storage layer, and a control gate electrode on the first insulating film, the control gate electrode including a metal film. The oxide film is disposed on the metal film.

Claims (42)

1. A semiconductor device comprising:

a semiconductor substrate; and

a plurality of memory cell transistors each having a gate electrode above the semiconductor substrate,

wherein each of the gate electrodes comprises:

a charge storage layer formed above the semiconductor substrate;

a first insulating film formed on the charge storage layer; and

a control gate electrode formed on the first insulating film, the control gate electrode including a metal film containing nitrogen, and an oxide film formed on a top surface of the metal film.

2. The device according to claim 1 , wherein

the oxide film contains nitrogen.

3. The device according to claim 1 , further comprising:

a second insulating film covering the memory cell transistors with air gaps between gates of the memory cell transistors.

4. The device according to claim 3 , wherein the air gaps extend above the top surface of the metal film.

5. The device according to claim 1 , wherein

nitrogen concentration in the top surface of the metal film is higher than nitrogen concentration in side surfaces thereof.

6. The semiconductor device according to claim 1 , wherein the metal film contains tungsten.

7. The device according to claim 1 , wherein the control gate electrodes are separated by an air gap.

8. A semiconductor device comprising:

a substrate;

a plurality of memory cell transistors connected in series along a first direction, each memory cell transistor having a gate electrode disposed above the substrate, wherein each of the gate electrodes comprises:

a charge storage layer above the substrate,

a first insulating film formed on the charge storage layer, and

a control gate electrode formed on the first insulating film; and

a metal layer disposed above the control gate electrodes, the metal layer having a width in the first direction that is substantially the same as a width of each of the control gate electrodes.

9. The semiconductor device according to claim 8 , wherein the metal layer includes tungsten.

10. The semiconductor device according to claim 9 , wherein the metal layer is nitrided.

11. The semiconductor device according to claim 8 , further comprising:

an oxide film disposed above the metal layer.

12. The semiconductor device according to claim 11 , wherein the oxide film has a width in the first direction that is substantially the same as a width of the control gate electrodes.

13. The semiconductor device according to claim 8 , further comprising:

a second insulating film covering the memory cell transistors with air gaps between gates of the memory cell transistors.

14. The semiconductor device according to claim 13 , wherein the air gaps extend above the top surface of the metal layer.

15. The semiconductor device according to claim 8 , wherein the control gate electrodes are separated by an air gap.

16. A method for manufacturing a semiconductor device, comprising:

forming a gate insulating film, a first film, a first insulating film, and a metal film above a semiconductor substrate;

forming an oxide film above the metal film;

forming a patterned mask layer above the oxide film;

patterning the oxide film, the metal film, the second conductive film, the first insulating film, and the first conductive film, using the patterned mask; and

nitridinq a surface region of the metal film, wherein the oxide film is formed on the surface region of the metal film, and a concentration of nitrogen in the surface region of the metal film is greater than a concentration of nitrogen in a region of the metal film that is below the surface region.

17. The method according to claim 16 , wherein the forming the oxide film comprises exposing the metal film to a silane gas (SiH 4 ) in a plasma CVD process.

18. The method according to claim 16 , further comprising:

forming a second insulating film to cover the patterned oxide film with air gaps between the patterned metal film.

19. The method according to claim 16 , further comprising forming an air gap on a side of the first film, the first insulating film, and the metal film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2014
From: MURATA, SHOTARO; NODA, KOTARO; NAGASHIMA, SATOSHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 032966/0016 →