Architecture for video, fast still and high quality still picture processing
An apparatus having a first circuit is disclosed. The first circuit may (i) receive an input signal from an electro-optical sensor and (ii) generate a compressed signal. The first circuit generally includes re-sampler circuits configured to process the input signal to generate output samples. Each output sample may be a linear combination of at least two input samples. Video processing may include at least two tasks among (a) generating a video signal by converting the input signal for an external video monitor, (b) generating a video signal by converting the input signal for a preview screen and (c) generating a video signal by resolution reduction of the input signal before compression. At least two re-sampler circuits may perform different tasks. Still processing generally includes a noise reduction of an input image of the input signal using at least one of the at least two re-sampler circuits.
1. An apparatus comprising:
a circuit configured to (i) color correct an input signal having at least one input image and (ii) generate a compressed signal based on said input signal after said input signal undergoes processing, said circuit having a plurality of re-sampler circuits comprising dedicated hardware circuits that are allocated differently to perform said processing based upon an image type, wherein
when said processing is of a video type of said image type, said processing includes (i) generating a first signal by converting said input signal into a first form suitable to display on an external video monitor, (ii) generating a second signal by converting said input signal into a second form suitable to display on a preview screen and (ii) generating a third signal by reducing a resolution of said input signal prior to compression, and
when said processing is of a still type of said image type, said processing includes (i) generating said third signal, (ii) performing a noise reduction of said third signal, and (iii) generating said second signal based on said third signal after said noise reduction.
2. The apparatus according to claim 1 , wherein (i) each of said re-sampler circuits is configured to process a plurality of first samples to generate a corresponding plurality of second samples and (ii) each of said second samples is a linear combination of at least two of said first samples.
3. The apparatus according to claim 1 , wherein at least three of said re-sampler circuits perform different ones of a plurality of tasks where said processing is of said video type.
4. The apparatus according to claim 1 , wherein said processing of said still type uses at least two of said re-sampler circuits involved in said processing of said video type.
5. The apparatus according to claim 1 , wherein each of said re-sampler circuits performs at most one of a plurality of tasks where said processing is of said still type.
6. The apparatus according to claim 1 , wherein said compressed signal conveys (i) a compressed sequence of video images where said processing is of said video type and (ii) a compressed still image where said processing is of said still type.
7. The apparatus according to claim 1 , wherein (i) a first of said re-sampler circuits is configured to generate said third signal conveying a down-sampled version of said input image by down sampling said input image and (ii) a second of said re-sampler circuits is configured to reduce a noise of said down-sampled version of said input image.
8. The apparatus according to claim 7 , wherein a third of said re-sampler circuits is configured to generate a second internal signal by up sampling said down-sampled version of said input image after said reduction of said noise.
9. The apparatus according to claim 1 , wherein processing of said input image as said still type includes at least one of said re-sampler circuits generating a preview picture, displayable on said preview screen, by down sampling said input image.
10. The apparatus according to claim 1 , wherein (i) at least one of said re-sampler circuits involved in said processing of said input image as said still type is configured to generate an output image from said input image, (ii) said output image and said input image match each other in size and (iii) said output image is smoother than said input image.