Fail safe circuit

1. Apparatus for preventing output of an input signal, comprising:

a signal control unit comprising:

a signal buffering unit having an input and an output, the signal buffering unit arranged to receive an input signal and pass the input signal to the output when the signal buffering unit is powered, wherein a negative power supply terminal of the signal buffering unit is arranged to be supplied by a first power source having a voltage; and

a boost circuit arranged to boost the voltage of the first power source to a boosted voltage higher than the voltage of the first power source and supply either the voltage of the first power source or the boosted voltage to a positive power supply terminal of the signal buffering unit, wherein

the signal buffering unit is powered when the boosted voltage is supplied to the positive power supply terminal of the signal buffering unit and the signal buffering unit is not powered when voltage of the first power supply terminal is supplied to the positive power supply terminal of the signal buffering unit.

2. The apparatus according to claim 1 , wherein the boost circuit is driven by a second power source and the boost circuit is arranged to provide the voltage of the first power supply to the positive power supply terminal of the signal buffering unit when the second power source is turned off and output the boosted voltage to the positive power supply terminal of the signal buffering unit when the second power source is turned on.

3. The apparatus according to claim 2 , wherein the boost circuit is a step-up converter.

4. The apparatus according to claim 3 , wherein the boost circuit is a step-up converter having a switching element, the switching element being switched by an oscillator circuit driven by the second power source.

5. The apparatus according to claim 4 , wherein the oscillator circuit includes a voltage threshold circuit arranged to prevent switching signals for switching the switching element being output in the event that the oscillator is being driven by a voltage less than a threshold voltage associated with the second voltage source.

6. The apparatus according to claim 2 , wherein the boost circuit is prevented from being driven by the second voltage source when the second voltage source is disconnected from the boost circuit.

7. The apparatus according to claim 1 , wherein the signal buffering unit comprises two buffers each formed in separate ICs, the two buffers arranged in series.

8. The apparatus according to claim 1 , further comprising a voltage monitoring circuit arranged to detect if a voltage supplied to the positive power supply terminal of the signal buffering unit by the boost circuit is less than a threshold voltage associated with the positive power supply terminal, wherein the threshold voltage associated with the positive power supply terminal is between the boosted voltage and the voltage of the first power source.

9. The apparatus according to claim 8 , wherein the threshold voltage associated with the positive power supply terminal is greater than or equal to the minimum operating voltage of the signal buffering unit.

10. The apparatus according claim 8 , wherein the signal buffering unit further comprises a switching arrangement arranged to prevent an input signal passing from the input to the output of the signal buffering unit, the switching arrangement of the signal buffering unit being switchable responsive to the voltage monitoring circuit detecting that the voltage supplied to the positive power supply terminal of the signal buffering unit is less than the threshold voltage.

11. The apparatus according to claim 1 , further comprising a further signal control unit provided according to a signal control unit, the further signal control unit provided in series with the signal control unit.

12. The apparatus according to claim 1 , wherein the input signal arranged to be received by the signal buffering unit is a control signal for controlling the switching of a switching arrangement for driving a motor.

13. Apparatus for providing output voltages for driving a motor, the apparatus comprising:

a first switching arrangement arranged for supplying a first output voltage responsive to a first control signal, the first switching arrangement powered by a first power supply;

a second switching arrangement arranged for supplying a second output voltage responsive to a second control signal, wherein the first and second control signals are arranged to respectively switch the first and second switching arrangements on at different instants in time;

a power storage arrangement arranged to be charged by the first power supply when the first switching arrangement is supplying the first output voltage and arranged to power the second switching arrangement when the second switching arrangement is supplying the second output voltage; and

a control unit arranged to prevent the supply of the first and second output voltages by preventing the supply of control signals to the first switching arrangement.

14. The apparatus according to claim 13 , wherein the first and second switching arrangements each comprise a switching element and a driving unit, each driving unit arranged to apply a signal to the respective switching element of the switching arrangement responsive to receipt of the respective control signal.

15. The apparatus according to claim 13 , wherein the power storage arrangement is a bootstrap circuit.

16. The apparatus according to claim 13 , wherein the first and second output voltages are for driving a motor.

17. The apparatus according to claim 16 , wherein the apparatus is arranged to provide output voltages corresponding to one phase of a three phase motor drive system.

18. A motor drive system comprising:

a three-phase motor; and

a drive unit comprising driving arrangements for each phase, wherein the driving arrangement for each phase is provided according to the apparatus of claim 13 .

19. The motor drive system according to claim 18 , further comprising a controller for producing control signals including the first and second control signals.