IP Library Granted Patent US 9,146,429
Granted Patent B2
US 9,146,429 · App. 14/205,378 · Granted Sep 29, 2015

Display panel

Inventors: Te-Chun Huang (New Taipei, TW); Kuo-Yu Huang (Hsinchu County, TW); Yu-Han Huang (Taipei, TW); Yi-Ji Tsai (Hsinchu, TW)
Assignee: Au Optronics Corporation
G02F1/134309G02F1/1368G02F1/13439G02F1/133345G02F1/136213G02F1/136227G02F2001/134372
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,146,429
App. No.
14/205,378
Granted
Sep 29, 2015
Kind
B2
Abstract

A display panel, which has a display region and a non-display region, includes an active array substrate and an opposite substrate disposed opposite to the active array substrate. The active array substrate includes a substrate, a pixel array, and a driving circuit. The pixel array and the driving circuit are disposed on the substrate, wherein the pixel array is located in the display region and the driving circuit is located in the non-display region. The driving circuit includes a first transparent electrode layer, a second transparent electrode layer, and a dielectric layer. The dielectric layer is located between the first transparent electrode layer and the second transparent electrode layer, wherein the first transparent electrode layer and the second transparent electrode layer are electrically coupled to each other to form at least one transparent capacitor.

Claims (66)

1. A display panel having a display region and a non-display region, the display panel comprising:

an active array substrate, comprising:

a substrate; and

a pixel array and a driving circuit disposed on the substrate, the pixel array located in the display region, and the driving circuit is disposed in the non-display region, wherein the driving circuit comprises:

a first transparent electrode layer;

a second transparent electrode layer; and

a dielectric layer located between the first transparent electrode layer and the second transparent electrode layer, wherein the first transparent electrode layer and the second transparent electrode layer are electrically coupled to each other to form at least one transparent capacitor; and

an opposite substrate disposed opposite to the active array substrate.

2. The display panel according to claim 1 , wherein the driving circuit further comprises:

a first conductive element and a second conductive element, the first conductive element or the second conductive element being a thin film transistor, a conductive line, or a combination thereof; and

an insulating layer covering the first conductive element and the second conductive element, wherein the at least one transparent capacitor is located on the insulating layer.

3. The display panel according to claim 2 , wherein:

the insulating layer has a first opening and a second opening respectively exposing the first conductive element and the second conductive element; and

the first transparent electrode layer and the second transparent electrode layer are respectively electrically connected to the first conductive element and the second conductive element through the first opening and the second opening.

4. The display panel according to claim 2 , further comprising:

a protection layer located on the first conductive element and the second conductive element, and the insulating layer is located on the protection layer, wherein

the insulating layer and the protection layer have a first opening and a second opening respectively exposing the first conductive element and the second conductive element; and

the first transparent electrode layer and the second transparent electrode layer are respectively electrically connected to the first conductive element and the second conductive element through the first opening and the second opening.

5. The display panel according to claim 2 , further comprising:

a protection layer located between the insulating layer and the first transparent electrode layer, wherein the insulating layer has a first opening and a second opening respectively exposing the first conductive element and the second conductive element;

the first transparent electrode layer and the second transparent electrode layer are respectively electrically connected to the first conductive element and the second conductive element through the first opening and the second opening.

6. The display panel according to claim 5 , wherein:

the dielectric layer has a contact opening, the first transparent electrode layer electrically connecting with the first conductive element through the contact opening and the first opening; and

the second transparent electrode layer is electrically connected with the second conductive element through the second opening.

7. The display panel according to claim 2 , further comprising:

a first protection layer located on the first conductive element and the second conductive element, and the insulating layer is located on the first protection layer; and

a second protection layer disposed between the insulating layer and the first transparent electrode layer.

8. The display panel according to claim 7 , wherein:

the insulating layer, the first protection layer, and the second protection layer have a first opening and a second opening for respectively exposing the first conductive element and the second conductive element; and

the first transparent electrode layer and the second transparent electrode layer are respectively electrically connected with the first conductive element and the second conductive element through the first opening and the second opening.

9. The display panel according to claim 8 , wherein:

the dielectric layer has a contact opening, the first transparent electrode layer being electrically connected with the first conductive element through the contact opening and the first opening; and

the second transparent electrode layer is electrically connected with the second conductive element through the second opening.

10. The display panel according to claim 1 , further comprising:

a sealant located between the active array substrate and the opposite substrate, wherein the sealant covers at least a portion of the driving circuit to define a space; and

a display medium located in the space.

11. The display panel according to claim 10 , wherein the sealant covers at least a portion of the at least one transparent capacitor.

12. The display panel according to claim 1 , wherein the driving circuit is a gate driving circuit, and a voltage difference between the first transparent electrode layer and the second transparent electrode layer is from −40V to +40V.

13. A display panel having a display region and a non-display region, the display panel comprising:

an active array substrate, comprising:

a substrate; and

a pixel array and a driving circuit disposed on the substrate, the pixel array located in the display region, and the driving circuit is disposed in the non-display region, wherein the driving circuit comprises at least one transparent capacitor;

an opposite substrate disposed opposite to the active array substrate; and

a sealant located between the active array substrate and the opposite substrate, wherein the sealant covers at least a portion of the driving circuit.

14. The display panel according to claim 13 , wherein the sealant comprises a photo-curable sealant, and the sealant covers at least a portion of the at least one transparent capacitor.

15. The display panel according to claim 13 , the driving circuit further comprising:

at least one conductive element; and

an insulating layer covering the at least one conductive element.

16. The display panel according to claim 15 , wherein:

the insulating layer has an opening to expose the conductive element; and

the transparent capacitor is electrically connected with the conductive element through the opening.

17. The display panel according to claim 15 , further comprising:

a protection layer located on the at least one conductive element, the insulating layer being located on the protection layer; wherein

the insulating layer and the protection layer have an opening exposing the conductive element; and the transparent capacitor is electrically connected with the conductive element through the opening.

18. The display panel according to claim 15 , further comprising a protection layer located between the insulating layer and the transparent capacitor, wherein the insulating layer has an opening to expose the conductive element, the protection layer is located on the insulating layer, and the protection layer at least partially exposes the opening to expose the conductive element, and the transparent capacitor is electrically connected with the conductive element through the opening.

19. The display panel according to claim 18 , wherein:

the dielectric layer has a contact opening, and the transparent capacitor is electrically connected with the conductive element through the contact opening and the opening.

20. The display panel according to claim 15 , further comprising:

a first protection layer located on the at least one conductive element, and the insulating layer is located on the first protection layer; and

a second protection layer located between the insulating layer and the transparent capacitor.

21. The display panel according to claim 20 , wherein:

the insulating layer and the first protection layer have an opening to expose the conductive element;

the second protection layer is located on the insulating layer, and the second protection layer at least partially exposes the opening to expose the conductive element;

and the transparent capacitor is electrically connected with the conductive element through the opening.

22. The display panel according to claim 21 , wherein:

the dielectric layer has a contact opening, and the transparent capacitor is electrically connected with the conductive element through the contact opening and the opening.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2025
From: AUO CORPORATION
To: NEOLAYER LLC
Reel/Frame 072266/0941 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2014
From: HUANG, TE-CHUN; HUANG, KUO-YU; HUANG, YU-HAN; TSAI, YI-JI
To: AU OPTRONICS CORPORATION
Reel/Frame 032469/0309 →
Priority Claims (1)
TW 102142334 A · Nov 20, 2013 · national
Continuity (1)
Related Publication 20150138465A1 · May 21, 2015