IP Library Granted Patent US 9,252,026
Granted Patent B2
US 9,252,026 · App. 14/207,303 · Granted Feb 2, 2016

Buried trench isolation in integrated circuits

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Quick Facts
Patent No.
US 9,252,026
App. No.
14/207,303
Granted
Feb 2, 2016
Kind
B2
Abstract

A system and method for providing electrical isolation between closely spaced devices in a high density integrated circuit (IC) are disclosed herein. An integrated circuit (IC) comprising a substrate, a first device, a second device, and a buried trench in the substrate and a method of fabricating the same are also discussed. The buried trench is positioned between first and second devices and may be filled with dielectric material. Alternatively, the buried trench contains air. A method of using Hydrogen annealing to create the buried trench is disclosed.

Claims (43)

1. A method, comprising:

forming a trench in a substrate, the trench having a closed end within the substrate and an open end adjacent a surface of the substrate;

forming a seed layer in the trench before initiating a reshaping of portion of the substrate surrounding the open end of the trench;

initiating the reshaping of portion of the substrate surrounding the open end of the trench;

closing the open end of the trench with substrate material to form an isolation region within the substrate; and

creating first and second devices on the surface of the substrate on opposite sides of the isolation region.

2. The method of claim 1 , further comprising:

depositing dielectric material in the trench such that the layer of dielectric material substantially fills the trench;

removing the dielectric material from a top portion of the trench; and

closing the open end of the trench such that the substrate material fills the top portion of the trench.

3. The method of claim 2 , further comprising:

forming a seed layer on the dielectric layer in the trench.

4. The method of claim 3 , wherein the forming of the seed layer is before closing the open end of the trench and the seed layer comprises a material that helps smooth reshaping of the substrate material and closing of the trench opening.

5. The method of claim 3 , wherein the seed layer comprises a same material as the substrate material.

6. The method of claim 2 , further comprising:

forming a seed layer on the dielectric layer in the trench and on the top surface of the substrate.

7. The method of claim 2 , further comprising:

forming a seed layer covering top of the dielectric layer, and covering every sidewall of the trench above the dielectric layer, and covering the top surface of the substrate.

8. The method of claim 1 , wherein the isolation region comprises an air gap.

9. The method of claim 1 , wherein:

the initiating of the reshaping of the portion of the substrate is at more than one location along the trench; and

the closing is of the trench at the more than one location to form more than one isolation regions, which are arranged vertically within the substrate.

10. The method of claim 1 , further comprising using hydrogen annealing to cause the substrate material to flow.

11. The method of claim 10 , wherein the hydrogen annealing comprises annealing in temperature range of approximately 600° C. to approximately 1150° C., and pressure range of approximately 0.1 Pa to approximately 100 kPa.

12. A method for isolating two devices formed on a substrate of an integrated circuit (IC), comprising:

forming a trench in the substrate between the two devices;

forming a seed layer in the trench before initiating a reshaping of portion of the substrate surrounding an open end of the trench;

initiating the reshaping of portion of the substrate surrounding the open end of the trench; and

closing the open end of the trench with substrate material, thereby forming an isolating region in the substrate.

13. The method of claim 12 , further comprising:

depositing dielectric material in the trench such that the layer of dielectric material substantially fills the trench;

removing the dielectric material from a top portion of the trench; and

closing the open end of the trench such that the substrate material fills the top portion of the trench.

14. The method of claim 13 , further comprising:

forming a seed layer on the dielectric layer in the trench.

15. The method of claim 14 , wherein the forming of the seed layer is before closing the open end of the trench and the seed layer comprises a material that helps smooth reshaping of the substrate material and closing of the trench opening.

16. The method of claim 14 , wherein the seed layer comprises a same material as the substrate material.

17. The method of claim 13 , further comprising:

forming a seed layer on the dielectric layer in the trench and on the top surface of the substrate.

18. The method of claim 13 , further comprising:

forming a seed layer covering top of the dielectric layer, and covering every sidewall of the trench above the dielectric layer, and covering the top surface of the substrate.

19. The method of claim 12 , further comprising using hydrogen annealing to cause the substrate material to flow.

20. The method of claim 19 , wherein the hydrogen annealing comprises annealing in temperature range of approximately 600° C. to approximately 1150° C., and pressure range of approximately 0.1 Pa to approximately 100 kPa.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2015
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 035896/0149 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2014
From: SUGINO, RINJI; XUE, LEI; LU, CHING-HUANG; CHAN, SIMON
To: SPANSION LLC
Reel/Frame 032462/0511 →