Power semiconductor devices incorporating single crystalline aluminum nitride substrate
The invention provides a power semiconductor device including an aluminum nitride single crystalline substrate, wherein the dislocation density of the substrate is less than about 10 5 cm −2 and the Full Width Half Maximum (FWHM) of the double axis rocking curve for the (002) and (102) crystallographic planes is less than about 200 arcsec; and a power semiconductor structure comprising at least one doped Al x Ga 1−x N layer overlying the aluminum nitride single crystalline substrate.
1. A power semiconductor device, comprising:
an aluminum nitride single crystalline substrate, wherein the dislocation density of the substrate is less than about 10 5 cm −2 and the Full Width Half Maximum (FWHM) of the double axis rocking curve for the (002) and (102) crystallographic planes is less than about 200 arcsec; and
a power semiconductor structure comprising a plurality of epitaxial doped Al x Ga 1−x N layers overlying the aluminum nitride single crystalline substrate, wherein the dislocation density of each epitaxial layer is substantially the same as the dislocation density of the substrate;
wherein the power semiconductor device is characterized by a breakdown field of at least about 5 MV/cm.
2. The power semiconductor device of claim 1 , wherein the dislocation density of the substrate is lower than 10 4 cm −2 .
3. The power semiconductor device of claim 1 , wherein the dislocation density of the substrate is lower than 10 3 cm −2 .
4. The power semiconductor device of claim 1 , wherein the dislocation density of the substrate is lower than 10 2 cm −2 .
5. The power semiconductor device of claim 1 , wherein the FWHM of the double axis rocking curve for the (002) and (102) crystallographic planes is less than about 100 arcsec.
6. The power semiconductor device of claim 1 , wherein the FWHM of the double axis rocking curve for the (002) and (102) crystallographic planes is less than about 50 arcsec.
7. The power semiconductor device of claim 1 , wherein the FWHM of the double axis rocking curve for the (002) and (102) crystallographic planes is less than about 25 arcsec.
8. The power semiconductor device of claim 1 , wherein the power semiconductor structure is in the form of a Schottky diode, a Junction Field Effect Transistors (JFET), or a Power Metal Oxide Semiconductor Field Effect Transistors (MOSFET).
9. The power semiconductor device of claim 1 , wherein the power semiconductor structure is in the form of a Schottky diode comprising a relatively lightly doped N-type drift region comprising one or more epitaxial Al x Ga 1−x N layers adjacent to a relatively heavily doped N+ region comprising one or more epitaxial Al x Ga 1− N layers.
10. The power semiconductor device of claim 9 , wherein at least one layer of doped Al x Ga 1− N has a value for x greater than about 0.7.
11. The power semiconductor device of claim 1 , wherein the aluminum nitride single crystalline substrate is prepared by physical vapor transport.
12. The power semiconductor device of claim 1 , wherein the power semiconductor device is characterized by one or more of the following:
a blocking voltage of at least about 20 kV; and
a switching frequency of at least about 20 kHz.
13. The power semiconductor device of claim 1 , wherein the power semiconductor device is a Schottky diode.
14. A method of forming a power semiconductor device, comprising:
receiving an aluminum nitride single crystalline substrate, wherein the dislocation density of the substrate is less than about 10 5 cm −2 and the Full Width Half Maximum (FWHM) of the double axis rocking curve for the (002) and (102) crystallographic planes is less than about 200 arcsec;
depositing a plurality of epitaxial doped Al x Ga 1− N active layers on the aluminum nitride single crystalline substrate, wherein the dislocation density of each epitaxial layer is substantially the same as the dislocation density of the substrate; and
forming metal electrode layers in contact with the doped Al x Ga 1− N active layers,
wherein the power semiconductor device is characterized by a breakdown field of at least about 5 MV/cm.
15. The method of claim 14 , wherein the depositing step comprises molecular-beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), or Hydride Vapor Phase Epitaxy (HVPE).
16. The method of claim 14 , wherein the power semiconductor structure is in the form of a Schottky diode and the depositing step comprises depositing one or more relatively heavily doped N+ Al x Ga 1− N layers on the aluminum nitride single crystalline substrate and depositing one or more relatively lightly doped N-type Al x Ga 1−x N layers on the relatively heavily doped N+ Al x Ga 1−x N layers.