IP Library Granted Patent US 9,343,504
Granted Patent B2
US 9,343,504 · App. 14/213,410 · Granted May 17, 2016

Low cross-talk for small pixel barrier detectors

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Quick Facts
Patent No.
US 9,343,504
App. No.
14/213,410
Granted
May 17, 2016
Kind
B2
Abstract

Methods and structures of barrier detectors are described. The structure may include an absorber that is at least partially reticulated. The at least partially reticulated absorber may also include an integrated electricity conductivity structure. The structure may include at least two contact regions isolated from one another. The structure may further include a barrier layer disposed between the absorber and at least two contact regions.

Claims (28)

1. A method of forming a barrier detector, the method comprising:

forming an absorber layer over a substrate;

forming additional layers overlying the absorber layer;

etching through at least one of the additional layers to access the absorber layer;

coupling a conductive grid with the accessed absorber layer;

subsequent to the coupling operation, removing the substrate, over which the absorber layer was formed, from the absorber layer; and

subsequent to the substrate removal, at least partially reticulating the absorber layer.

2. The method of claim 1 , wherein the reticulation comprises etching the absorber layer between defined pixels such that the absorber may be characterized by a greater width across pixels and a lesser width between pixels.

3. The method of claim 1 , wherein the reticulation comprises etching a profile across the absorber layer to form a pattern of raised structures across the absorber.

4. The method of claim 1 , wherein forming the absorber layer comprises adding a dopant to the absorber material.

5. The method of claim 4 , wherein the dopant is added to form a dopant profile within the formed absorber, and wherein the profile comprises a higher dopant concentration in the absorber at a lateral cross-section distal the substrate than at a lateral cross-section proximate the substrate.

6. The method of claim 1 , wherein forming additional layers overlying the absorber layer comprises forming a barrier layer overlying the absorber layer.

7. The method of claim 6 , wherein forming a barrier layer comprises forming at least two layers of material as the barrier layer, wherein the two layers differ in either bandgap or doping.

8. The method of claim 1 , further comprising attaching the barrier detector to an integrated circuit component.

9. A method of forming a barrier detector, the method comprising:

forming an absorber layer directly overlying a substrate, wherein the absorber layer comprises a first side and a second side opposite the first side, and wherein the absorber layer contacts the substrate on the first side of the absorber layer;

forming a barrier layer overlying the second side of the absorber layer;

forming at least one additional layer overlying the barrier layer;

etching a via through the at least one additional layer and the barrier layer to access the second side of the absorber layer;

forming a conductive grid through the via, wherein the conductive grid is electrically coupled with the second side of the absorber layer;

subsequent to the formation of the conductive grid, removing the substrate from the first side of the absorber layer; and

subsequent to the substrate removal, at least partially reticulating the first side of the absorber layer.

10. The method of claim 9 , wherein the conductive grid comprises an extension to access the second side of the absorber layer with the conductive grid.

11. The method of claim 10 , further comprising forming a plurality of additional vias through the barrier layer, wherein the conductive grid further comprises a plurality of extensions, and wherein each extension of the plurality of extensions accesses the second side of the absorber layer through one of the plurality of additional vias.

12. The method of claim 9 , further comprising passivating the via to electrically insulate the barrier material from the conductive grid.

13. The method of claim 9 , wherein forming the barrier layer comprises forming at least two layers of material as the barrier layer, wherein the two layers differ in either bandgap or doping.

14. The method of claim 9 , wherein forming the absorber layer comprises adding a dopant to the absorber material.

15. The method of claim 14 , wherein the dopant is added to form a dopant profile within the formed absorber, and wherein the profile comprises a higher dopant concentration in the absorber at a lateral cross-section proximate the second side of the absorber than at a lateral cross-section proximate the first side of the absorber.

Assignments (5)
CHANGE OF NAME Recorded Mar 31, 2015
From: DRS RSTA, INC.
To: DRS NETWORK & IMAGING SYSTEMS, LLC
Reel/Frame 035349/0060 →
RELEASE OF SECURITY INTEREST Recorded Jan 6, 2015
From: DELL PRODUCTS L.P.
To: SKYERA, LLC
Reel/Frame 034742/0069 →
SECURITY INTEREST Recorded Nov 11, 2014
From: SKYERA, INC.
To: WESTERN DIGITAL CAPITAL, INC.
Reel/Frame 034204/0849 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2014
From: D'SOUZA, ARVIND I.; MUZILLA, MARK; IONESCU, ADRIAN
To: DRS RSTA, INC.
Reel/Frame 033997/0323 →
SECURITY INTEREST Recorded Aug 14, 2014
From: SKYERA, INC.
To: DELL PRODUCTS L.P.
Reel/Frame 033546/0001 →