IP Library Granted Patent US 10,055,253
Granted Patent B2
US 10,055,253 · App. 14/224,272 · Granted Aug 21, 2018

Reducing processor loading during housekeeping operations

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Quick Facts
Patent No.
US 10,055,253
App. No.
14/224,272
Granted
Aug 21, 2018
Kind
B2
Abstract

A method includes, in a processor, receiving first and second operations for periodic execution with respective specified time periods. Respective actual time periods having no common divisor are derived from the specified time periods. The first and second operations are executed periodically with the respective actual time periods.

Claims (17)

1. A method, comprising:

in a processor, receiving first and second operations for periodic execution with respective first and second specified time periods;

deriving from the first and second specified time periods respective first and second actual time periods, by choosing respective prime number time periods nearest to the specified time periods, wherein at least the first specified time period is different from the first actual time period;

executing the first and second operations periodically with the respective first and second actual time periods;

estimating results of the first operation at the specified time periods by interpolating the results of the first operation at the actual time periods; and

outputting the estimated results, wherein the first operation comprises a task for collecting statistics in a computer system of the processor,

wherein the first and second operations comprise housekeeping tasks of the processor.

2. The method according to claim 1 , wherein the first and the second operations have execution times shorter than the respective specified time periods.

3. An apparatus, comprising:

a memory storing software for running operations; and

a processor, which is configured to receive indications of first and second operations for periodic execution with respective first and second specified time periods and to derive from the first and second specified time periods respective first and second actual time periods, by choosing respective prime number time periods nearest to the specified time periods, wherein at least the first specified time period is different from the first actual time period, to execute the first and second operations periodically with the respective first and second actual time periods, using software stored in the memory, to estimate results of the first operation at the specified time periods by interpolating the results of the first operation at the actual time periods, and to output the estimated results,

wherein the first and second operations comprise housekeeping tasks of the processor.

4. The apparatus according to claim 3 , wherein the first and the second operations have execution times shorter than the respective specified time periods.

5. The apparatus according to claim 3 , wherein the first operation comprises a task for collecting statistics in a computer system of the processor.

6. The apparatus according to claim 3 , wherein the first operation comprises a disk storage maintenance utility.

7. The apparatus according to claim 3 , wherein the first operation comprises a task for collection of interface counter statistics.

8. The method according to claim 1 , wherein the first operation comprises a task for collection of interface counter statistics.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL AT REEL/FRAME NO. 37900/0720 Recorded Jul 13, 2018
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MELLANOX TECHNOLOGIES, LTD.
Reel/Frame 046542/0792 →
PATENT SECURITY AGREEMENT Recorded Feb 24, 2016
From: MELLANOX TECHNOLOGIES, LTD.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 037900/0720 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2014
From: BAZ, ITAI
To: MELLANOX TECHNOLOGIES LTD.
Reel/Frame 032516/0748 →