Control method for nonvolatile memory device with vertically stacked structure
View Patent ↗A control method for a nonvolatile memory device with a vertically stacked structure is provided. The nonvolatile memory device includes a substrate, a common source line formed on the substrate, and plural memory blocks disposed over the substrate. Each memory block includes a cell string connected between a bit line and the common source line. Firstly, a first memory block of the plural memory blocks is selected as an active memory block, and one of the remaining memory blocks is selected as a second memory block. Then, a ground voltage is provided to the bit line of the second memory block, and the cell string of the second memory block is conducted, so that the ground voltage is transmitted from the bit line to the common source line through the cell string.
1. A control method for a nonvolatile memory device with a vertically stacked structure, the nonvolatile memory device comprising a substrate, a common source line and plural memory blocks, the common source line being formed on the substrate, the plural memory blocks being disposed over the substrate, each memory block comprising a cell string connected between a bit line and the common source line, the control method comprising steps of:
selecting a first memory block of the plural memory blocks as an active memory block when the first memory block is in a program mode or a read mode, and selecting one of the remaining memory blocks as a second memory block, wherein the second memory block is inactive when the first memory block is in the program mode or the read mode; and
providing a ground voltage to the bit line of the second memory block and conducting the cell string of the second memory block, so that the ground voltage is transmitted from the bit line to the common source line of the substrate through the cell string.
2. The control method as claimed in claim 1 , wherein the second memory block further comprises plural control lines, wherein the plural control lines are connected to the cell string, and corresponding voltages are provided to the plural control lines to conduct the cell string.
3. The control method as claimed in claim 2 , wherein the plural control lines comprise an upper selection line, plural words lines and a lower selection line.
4. The control method as claimed in claim 2 , wherein a pass voltage or a turn-on voltage is provided to the plural control lines to conduct the cell string.
5. The control method as claimed in claim 1 , further comprising steps of:
selecting one of the remaining memory blocks as a third memory block, wherein the third memory block is inactive when the first memory block is in the program mode or the read mode; and
providing the ground voltage to the bit line of the third memory block and conducting the cell string of the third memory block, so that the ground voltage is transmitted from the bit line to the common source line of the substrate through the cell string.
6. A control method for a nonvolatile memory device with a vertically stacked structure, the nonvolatile memory device comprising a substrate, a common source line and plural memory blocks, the common source line being formed on the substrate, the plural memory blocks being disposed over the substrate, each memory block comprising a cell string connected between a bit line and the common source line, the control method comprising steps of:
providing a ground voltage to the bit line of at least one inactive memory block neighboring an active memory block and conducting the cell string of the inactive memory block to transmit the ground voltage from the bit line to the common source line of the substrate through the cell string of the inactive memory block;
wherein the active memory block is selected to program or read, and the inactive memory block is not used to program or read when the active memory block is programming or reading.