IP Library Granted Patent US 9,130,046
Granted Patent B2
US 9,130,046 · App. 14/228,663 · Granted Sep 8, 2015

Display device including transistor and manufacturing method thereof

Inventors: Junichiro Sakata (Atsugi, JP); Toshinari Sasaki (Atsugi, JP); Miyuki Hosoba (Isehara, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L21/02554H01L21/02565H01L21/02631H01L29/66969H01L29/78645H01L29/78648H01L29/78696
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Quick Facts
Patent No.
US 9,130,046
App. No.
14/228,663
Granted
Sep 8, 2015
Kind
B2
Abstract

An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

Claims (39)

1. A semiconductor device comprising:

a first conductive layer comprising a first region, the first region being configured to serve as a first gate electrode;

a first insulating layer comprising a second region over the first conductive layer, the second region being configured to serve as a first gate insulating layer;

an oxide semiconductor layer over the first insulating layer;

a second insulating layer comprising a third region over the oxide semiconductor layer, the third region being configured to serve as a channel protective layer;

a second conductive layer comprising a fourth region over the second insulating layer, the fourth region being configured to serve as one of a source electrode and a drain electrode;

a third conductive layer comprising a fifth region over the second insulating layer, the fifth region being configured to serve as another of the source electrode and the drain electrode;

a third insulating layer comprising a sixth region over the second conductive layer and the third conductive layer, the sixth region being configured to serve as a second gate insulating layer;

a fourth conductive layer comprising a seventh region over the third insulating layer, the seventh region being configured to serve as a second gate electrode;

a fourth insulating layer over the fourth conductive layer; and

a pixel electrode electrically connected to the second conductive layer,

wherein each of the fourth conductive layer and the pixel electrode comprising a light-transmitting conductive material, and

wherein the fourth conductive layer overlaps a light-blocking layer.

2. The semiconductor device according to claim 1 , wherein the fourth conductive layer and the pixel electrode are formed from a same layer.

3. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

4. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises a microcrystalline region.

5. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises an oxygen-excess region.

6. The semiconductor device according to claim 1 , wherein the light-blocking layer is the first conductive layer.

7. The semiconductor device according to claim 1 , wherein the light-blocking layer is a part of a black matrix.

8. The semiconductor device according to claim 1 , wherein the first conductive layer and the fourth conductive layer are supplied with a same potential.

9. A semiconductor device comprising:

a first conductive layer;

a first insulating layer over the first conductive layer;

an oxide semiconductor layer over the first insulating layer;

a second insulating layer over the oxide semiconductor layer;

a second conductive layer and a third conductive layer over the second insulating layer;

a third insulating layer over the second conductive layer and the third conductive layer;

a fourth conductive layer over the third insulating layer;

a fourth insulating layer over the fourth conductive layer; and

a pixel electrode electrically connected to the second conductive layer,

wherein each of the fourth conductive layer and the pixel electrode comprising a light-transmitting conductive material, and

wherein the fourth conductive layer overlaps a light-blocking layer.

10. The semiconductor device according to claim 9 , wherein the fourth conductive layer and the pixel electrode are formed from a same material.

11. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

12. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer comprises a microcrystalline region.

13. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer comprises an oxygen-excess region.

14. The semiconductor device according to claim 9 , wherein the light-blocking layer is the first conductive layer.

15. The semiconductor device according to claim 9 , wherein the light-blocking layer is a part of a black matrix.

16. The semiconductor device according to claim 9 , wherein the first conductive layer and the fourth conductive layer are supplied with a same potential.

Priority Claims (1)
JP 2009-159052 · Jul 3, 2009 · national
Continuity (3)
Continuation 13632709 · Oct 1, 2012
Continuation 12828464 · Jul 1, 2010
Related Publication 20140209901A1 · Jul 31, 2014