Method and system for split voltage domain transmitter circuits
View Patent ↗Methods and systems for a photonically enabled complementary metal-oxide semiconductor (CMOS) chip are disclosed and may comprise in an integrated circuit comprising a driver: amplifying a received signal in a plurality of partial voltage domains, and generating the partial voltage domains in a domain splitter in the driver. A voltage domain boundary value between two partial voltage domains may be controlled utilizing a differential amplifier that samples an output voltage of a cascade amplifier that is an input to the driver and controls a current supplying said cascade amplifier. A series of diodes may be driven in differential mode via the amplified signals. An optical signal may be modulated via the diodes, which may be integrated in a Mach-Zehnder modulator or a ring modulator. The diodes may be connected in a distributed configuration. The amplified signals may be communicated to the diodes via transmission lines, which may be even-mode coupled.
1. A method for processing signals, the method comprising:
in an integrated circuit comprising a driver:
amplifying a received signal in a plurality of partial voltage domains;
generating said partial voltage domains in a domain splitter in said driver; and
controlling a voltage domain boundary value between two partial voltage domains utilizing a differential amplifier that samples an output voltage of a cascade amplifier that is an input to the driver and controls a current supplying said cascade amplifier.
2. The method according to claim 1 , comprising driving a series of diodes in differential mode via said amplified signals.
3. The method according to claim 2 , comprising modulating an optical signal via said diodes.
4. The method according to claim 2 , wherein said diodes are integrated in a Mach-Zehnder modulator.
5. The method according to claim 2 , wherein said diodes are integrated in a ring modulator.
6. The method according to claim 2 , wherein said diodes are connected in a distributed configuration.
7. The method according to claim 2 , comprising communicating said amplified signals to said diodes via transmission lines.
8. The method according to claim 7 , wherein said transmission lines are even-mode coupled.
9. The method according to claim 1 , comprising generating said partial voltage domains via stacked source follower circuits.
10. The method according to claim 1 , comprising generating said partial voltage domains via stacked emitter follower circuits.
11. The method according to claim 1 , comprising generating said voltage domain boundary value of one half the supply voltage via symmetric stacked circuits.
12. A system for processing signals, the system comprising:
one or more circuits comprising a driver, said one or more circuits being operable to:
amplify a received signal in a plurality of partial voltage domains;
generate said partial voltage domains in a domain splitter in said driver; and
control a voltage domain boundary value between two partial voltage domains utilizing a differential amplifier that samples an output voltage of a cascade amplifier that is an input to the driver and controls a current supplying said cascade amplifier.
13. The system according to claim 12 , wherein said one or more circuits is operable to drive a series of diodes in differential mode via said amplified signals.
14. The system according to claim 13 , wherein said one or more circuits is operable to modulate an optical signal via said diodes.
15. The system according to claim 13 , wherein said diodes are integrated in a Mach-Zehnder modulator.
16. The system according to claim 13 , wherein said diodes are integrated in a ring modulator.
17. The system according to claim 13 , wherein said diodes are connected in a distributed configuration.
18. The system according to claim 13 , wherein said one or more circuits is operable to communicate said amplified signals to said diodes via transmission lines.
19. The system according to claim 18 , wherein said transmission lines are even-mode coupled.
20. The system according to claim 12 , wherein said one or more circuits is operable to generate said partial voltage domains via stacked source follower circuits.
21. The system according to claim 12 , wherein said one or more circuits is operable to generate said partial voltage domains via stacked emitter follower circuits.
22. The system according to claim 12 , wherein said one or more circuits is operable to generate said voltage domain boundary value of one half the supply voltage via symmetric stacked circuits.
23. The system according to claim 12 , wherein said one or more circuits comprises an integrated circuit.