IP Library Granted Patent US 10,229,072
Granted Patent B2
US 10,229,072 · App. 14/230,908 · Granted Mar 12, 2019

System and method for despreader memory management

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Quick Facts
Patent No.
US 10,229,072
App. No.
14/230,908
Granted
Mar 12, 2019
Kind
B2
Abstract

The disclosure is directed to a system and method of managing memory resources in a communication channel. According to various embodiments, incoming memory slices associated with a plurality of data sectors are de-interleaved and transferred sequentially through a buffer to a decoder for further processing. To prevent buffer overflow or degraded decoder performance, the memory availability of the buffer is monitored, and transfers are suspended when the memory availability of the buffer is below a threshold buffer availability.

Claims (38)

1. A communication channel, comprising:

a despreader memory block configured to de-interleave incoming memory slices associated with a plurality of data sectors;

a buffer configured to receive the de-interleaved memory slices and further configured to transfer the de-interleaved memory slices of the plurality of data sectors sequentially to a decoder for further processing; and

a resource management controller configured to monitor a memory availability of the despreader memory block and a memory availability of the buffer and further configured to prevent the despreader memory block from transferring the de-interleaved memory slices of a data sector to the buffer when the memory availability of the buffer is below a threshold buffer availability and the memory availability of the despreader memory block is above a threshold despreader availability.

2. The communication channel of claim 1 , wherein the resource management controller is further configured to allow the despreader memory block to transfer the de-interleaved memory slices of the data sector to the buffer when the memory availability of the despreader memory block is below the threshold despreader availability, regardless of the memory availability of the buffer.

3. The communication channel of claim 1 , wherein the resource management controller is further configured to allow the despreader memory block to transfer a remainder of the de-interleaved memory slices of the data sector to the buffer when at least one memory slice of the data sector has already been transferred to the buffer, regardless of the memory availability of the buffer.

4. The communication channel of claim 3 , wherein the resource management controller is further configured to check the memory availability of the buffer before a first memory slice of the data sector is transferred from the despreader memory block to the buffer.

5. The communication channel of claim 4 , wherein the resource management controller is further configured to check the memory availability of the despreader memory block before the first memory slice of the data sector is transferred from the despreader memory block to the buffer when the memory availability of the buffer is below the threshold buffer availability.

6. The communication channel of claim 5 , wherein the resource management controller is further configured to allow the despreader memory block to transfer the first memory slice of the data sector to the buffer when the memory availability of the buffer is no longer below the threshold buffer availability or when the memory availability of the despreader memory block is below the threshold despreader availability.

7. The communication channel of claim 1 , wherein the despreader memory block includes the resource management controller.

8. The communication channel of claim 1 , wherein the despreader memory block has a greater storage capacity than the buffer.

9. A storage device, comprising:

a storage controller;

a storage medium;

a write channel in communication with the storage controller, the write channel including a spreader memory block configured to interleave memory slices associated with a plurality of data sectors being transferred from the storage controller to the storage medium; and

a read channel in communication with the storage controller, the read channel including: a despreader memory block configured to de-interleave memory slices of a plurality of data sectors being retrieved by the storage controller from the storage medium; a buffer configured to receive the de-interleaved memory slices and further configured to transfer the de-interleaved memory slices of the retrieved data sectors sequentially to the storage controller; and a resource management controller configured to monitor a memory availability of the despreader memory block and a memory availability of the buffer and further configured to prevent the despreader memory block from transferring the de-interleaved memory slices of a data sector to the buffer when the memory availability of the buffer is below a threshold buffer availability and the memory availability of the despreader memory block is above a threshold despreader availability.

10. The storage device of claim 9 , wherein the resource management controller is further configured to allow the despreader memory block to transfer the de-interleaved memory slices of the data sector to the buffer when the memory availability of the despreader memory block is below the threshold despreader availability, regardless of the memory availability of the buffer.

11. The storage device of claim 9 , wherein the resource management controller is further configured to allow the despreader memory block to transfer a remainder of the de-interleaved memory slices of the data sector to the buffer when at least one memory slice of the data sector has already been transferred to the buffer, regardless of the memory availability of the buffer.

12. The storage device of claim 11 , wherein the resource management controller is further configured to check the memory availability of the buffer before a first memory slice of the data sector is transferred from the despreader memory block to the buffer.

13. The storage device of claim 12 , wherein the resource management controller is further configured to check the memory availability of the despreader memory block before the first memory slice of the data sector is transferred from the despreader memory block to the buffer when the memory availability of the buffer is below the threshold buffer availability.

14. The storage device of claim 13 , wherein the resource management controller is further configured to allow the despreader memory block to transfer the first memory slice of the data sector to the buffer when the memory availability of the buffer is no longer below the threshold buffer availability or when the memory availability of the despreader memory block is below the threshold despreader availability.

15. The storage device of claim 9 , wherein the storage controller is configured to receive instructions from a redundant array of independent disks (RAID) controller, the RAID controller being in further communication with a plurality of storage devices included with the storage device in a RAID storage cluster.

16. A method of managing memory resources in a communication channel, comprising:

de-interleaving incoming memory slices associated with a plurality of data sectors;

transferring the de-interleaved memory slices of the plurality of data sectors sequentially through a buffer to a decoder;

monitoring a memory availability of the buffer; and

suspending the transfer of the de-interleaved memory slices of a data sector through the buffer when the memory availability of the buffer is below a threshold buffer availability.

17. The method of claim 16 , further comprising:

monitoring a memory availability of a despreader memory block; and

transferring the de-interleaved memory slices of the data sector through the buffer when the memory availability of the despreader memory block is below a threshold despreader availability, regardless of the memory availability of the buffer.

18. The method of claim 16 , further comprising:

determining when a first memory slice of the data sector has been transferred to the buffer;

transferring a remainder of the de-interleaved memory slices of the data sector to the buffer when the first memory slice of the data sector has already been transferred to the buffer, regardless of the memory availability of the buffer.

19. The method claim 18 , further comprising:

checking the memory availability of the buffer before the first memory slice of the data sector is transferred to the buffer.

20. The method of claim 19 , further comprising:

checking the memory availability of a despreader memory block before the first memory slice of the data sector is transferred to the buffer when the memory availability of the buffer is below the threshold buffer availability; and

transferring the first memory slice of the data sector to the buffer when the memory availability of the buffer is no longer below the threshold buffer availability or when the memory availability of the despreader memory block is below a threshold despreader availability.

Assignments (10)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2018
From: NGUYEN, KAITLYN T.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047750/0808 →
MERGER Recorded Sep 26, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047397/0307 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2014
From: JEONG, KU HONG; ZUO, QI; YANG, SHAOHUA
To: LSI CORPORATION
Reel/Frame 032564/0607 →