IP Library Granted Patent US 9,459,880
Granted Patent B2
US 9,459,880 · App. 14/230,951 · Granted Oct 4, 2016

Information processing apparatus and output control method

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Quick Facts
Patent No.
US 9,459,880
App. No.
14/230,951
Granted
Oct 4, 2016
Kind
B2
Abstract

An information processing apparatus includes a BIOS, a setting module, a determination module and a display controller. The setting module sets a display priority order at booting in the BIOS. The determination module determines connection of display units in order of priority based on the display priority order. The display controller performs a shortest waiting operation based on the connection determination and executes a display operation. An information processing apparatus having a screen display output includes a control program, a setting module, a determiner and a display controller. The setting module sets a display priority order at booting in the control program. The determiner determines whether display units are connected, in order of priority based on the display priority order. The display controller performs a shortest waiting operation based on the connection determination and executes a display operation.

Claims (27)

1. An information processing apparatus comprising:

a Basic Input and Output System (BIOS);

a setting circuit configured to set a display priority order at booting in the BIOS;

a determination circuit configured to determine whether display units are connected, in order of priority based on the display priority order; and

a display control circuit configured to perform one or more wait processing operations based on the connection determination and to execute a display operation.

2. The information processing apparatus according to claim 1 , further comprising:

a general-purpose input/output (GPIO) configured to monitor a connection state of a display unit by a hot plug detect (HPD) signal from said display unit,

wherein a time required to determine connection of the display unit is based on the monitoring result of the GPIO.

3. The information processing apparatus according to claim 1 , further comprising:

a detection circuit configured to detect whether a lid of a display unit (LID) is opened or closed and whether a dock is present,

wherein a time required to determine connection of the display unit is based on the detection result of the detector.

4. An output control method in an information processing apparatus including a Basic Input and Output System (BIOS), comprising:

setting a display priority order at booting in the BIOS;

determining whether display units are connected, in order of priority based on the display priority order;

performing one or more wait processing operations based on the connection determination; and

executing a display operation.

5. An information processing apparatus including a screen display output, comprising:

a control program;

a setting circuit configured to set a display priority order at booting in the control program;

a determination circuit configured to determine whether display units are connected, in order of priority based on the display priority order; and

a display control circuit configured to perform one or more wait processing operations based on the determination that display units are connected and to execute a display operation.

6. The information processing apparatus according to claim 5 , further comprising:

a general-purpose input/output (GPIO) configured to monitor a connection state of a screen display output by a hot plug detect (HPD) signal from said screen display output,

wherein a time required to determine connection of the screen display output is based on the monitoring result of the GPIO.

7. The information processing apparatus according to claim 5 , further comprising:

a detection circuit configured to detect whether a lid of a display unit (LID) is opened or closed and whether a dock is present,

wherein a time required to determine connection of a screen display output is based on the detection result of the detector.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2019
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA CLIENT SOLUTIONS CO., LTD.
Reel/Frame 048720/0635 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2014
From: SONOBE, HAJIME; CHIBA, HIROAKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 032566/0883 →